Inventor · disambiguated record
Kuljit S. Bains
Also filed as: BAINS KULJIT · BAINS KULJIT S · BAINS KULJIT SINGH
205 granted patents·45 pending applications·2,923 citations·filing 1994–2025
99Inventor score
Top patents by PatentIndex Score
250 records- 0199US10210925B2Row hammer refresh commandINTEL CORP·Filed 2017·Granted Feb 19, 2019·75 cites·20 claims
- 0299US10083737B2Row hammer monitoring based on stored row hammer threshold valueINTEL CORP·Filed 2017·Granted Sep 25, 2018·79 cites·20 claims
- 0399US9865326B2Row hammer refresh commandINTEL CORP·Filed 2016·Granted Jan 9, 2018·83 cites·42 claims
- 0499US9747971B2Row hammer refresh commandINTEL CORP·Filed 2015·Granted Aug 29, 2017·84 cites·46 claims
- 0599US9384821B2Row hammer monitoring based on stored row hammer threshold valueINTEL CORP·Filed 2013·Granted Jul 5, 2016·106 cites·15 claims
- 0699US9299400B2Distributed row hammer trackingINTEL CORP·Filed 2012·Granted Mar 29, 2016·72 cites·28 claims
- 0799US9286964B2Method, apparatus and system for responding to a row hammer eventINTEL CORP·Filed 2012·Granted Mar 15, 2016·88 cites·28 claims
- 0899US9236110B2Row hammer refresh commandBAINS KULJIT S·Filed 2012·Granted Jan 12, 2016·65 cites·30 claims
- 0999US9032141B2Row hammer monitoring based on stored row hammer threshold valueINTEL CORP·Filed 2012·Granted May 12, 2015·151 cites·23 claims
- 1098US11314589B2Read retry to selectively disable on-die ECCINTEL CORP·Filed 2020·Granted Apr 26, 2022·8 cites·21 claims
- 1198US10810079B2Memory device error check and scrub mode and error transparencyINTEL CORP·Filed 2018·Granted Oct 20, 2020·26 cites·29 claims
- 1298US10127101B2Memory device error check and scrub mode and error transparencyINTEL CORP·Filed 2015·Granted Nov 13, 2018·29 cites·23 claims
- 1398US9780782B2On-die termination control without a dedicated pin in a multi-rank systemINTEL CORP·Filed 2014·Granted Oct 3, 2017·34 cites·19 claims
- 1498US9117544B2Row hammer refresh commandBAINS KULJIT·Filed 2013·Granted Aug 25, 2015·103 cites·15 claims
- 1597US10872011B2Internal error checking and correction (ECC) with extra system bitsINTEL CORP·Filed 2017·Granted Dec 22, 2020·27 cites·23 claims
- 1697US9934143B2Mapping a physical address differently to different memory devices in a groupINTEL CORP·Filed 2013·Granted Apr 3, 2018·77 cites·19 claims
- 1797US9817714B2Memory device on-die error checking and correcting codeINTEL CORP·Filed 2015·Granted Nov 14, 2017·24 cites·22 claims
- 1897US9721643B2Row hammer monitoring based on stored row hammer threshold valueINTEL CORP·Filed 2016·Granted Aug 1, 2017·20 cites·27 claims
- 1997US8862973B2Method and system for error management in a memory deviceBAINS KULJIT S·Filed 2009·Granted Oct 14, 2014·91 cites·29 claims
- 2096US9842021B2Memory device check bit read modeINTEL CORP·Filed 2015·Granted Dec 12, 2017·13 cites·21 claims
- 2196US8938573B2Row hammer condition monitoringGREENFIELD ZVIKA·Filed 2012·Granted Jan 20, 2015·88 cites·14 claims
- 2296US7432731B2Method and apparatus to calibrate DRAM on resistance (Ron) and on-die termination (ODT) values over process, voltage and temperature (PVT) variationsINTEL CORP·Filed 2005·Granted Oct 7, 2008·67 cites·14 claims
- 2395US10141935B2Programmable on-die termination timing in a multi-rank systemINTEL CORP·Filed 2015·Granted Nov 27, 2018·22 cites·22 claims
- 2495US9870325B2Common die implementation for memory devices with independent interface pathsINTEL CORP·Filed 2015·Granted Jan 16, 2018·13 cites·22 claims
- 2595US9761298B2Method, apparatus and system for responding to a row hammer eventINTEL CORP·Filed 2016·Granted Sep 12, 2017·15 cites·38 claims
- 2695US8310854B2Identifying and accessing individual memory devices in a memory channelMACWILLIAMS PETER·Filed 2011·Granted Nov 13, 2012·21 cites·33 claims
- 2794US11776619B2Techniques to couple high bandwidth memory device on silicon substrate and package substrateTAHOE RES LTD·Filed 2023·Granted Oct 3, 2023·1 cites·20 claims
- 2894US10496473B2Extracting selective information from on-die dynamic random access memory (DRAM) error correction code (ECC)INTEL CORP·Filed 2017·Granted Dec 3, 2019·11 cites·18 claims
- 2994US10146711B2Techniques to access or operate a dual in-line memory module via multiple data channelsINTEL CORP·Filed 2016·Granted Dec 4, 2018·14 cites·27 claims
- 3094US10108512B2Validation of memory on-die error correction codeINTEL CORP·Filed 2016·Granted Oct 23, 2018·12 cites·20 claims
- 3193US11966286B2Read retry to selectively disable on-die ECCINTEL CORP·Filed 2022·Granted Apr 23, 2024·2 cites·20 claims
- 3293US9564201B2Method, apparatus and system for responding to a row hammer eventINTEL CORP·Filed 2016·Granted Feb 7, 2017·11 cites·33 claims
- 3393US8392650B2Fast exit from self-refresh state of a memory deviceBAINS KULJIT S·Filed 2010·Granted Mar 5, 2013·15 cites·17 claims
- 3493US7774684B2Reliability, availability, and serviceability in a memory deviceINTEL CORP·Filed 2006·Granted Aug 10, 2010·30 cites·17 claims
- 3593US7454586B2Memory device commandsINTEL CORP·Filed 2005·Granted Nov 18, 2008·35 cites·19 claims
- 3692US10490239B2Programmable data pattern for repeated writes to memoryINTEL CORP·Filed 2016·Granted Nov 26, 2019·9 cites·28 claims
- 3792US9153296B2Methods and apparatuses for dynamic memory terminationMCCALL JAMES A·Filed 2012·Granted Oct 6, 2015·14 cites·17 claims
- 3892US8972685B2Method, apparatus and system for exchanging communications via a command/address busBAINS KULJIT S·Filed 2012·Granted Mar 3, 2015·17 cites·30 claims
- 3992US8274308B2Method and apparatus for dynamic memory terminationMCCALL JAMES A·Filed 2010·Granted Sep 25, 2012·23 cites·36 claims
- 4092US8161356B2Systems, methods, and apparatuses to save memory self-refresh powerBAINS KULJIT S·Filed 2008·Granted Apr 17, 2012·26 cites·24 claims
- 4192US7281079B2Method and apparatus to counter mismatched burst lengthsINTEL CORP·Filed 2003·Granted Oct 9, 2007·78 cites·20 claims
- 4291US12235720B2Adaptive error correction to improve system memory reliability, availability, and serviceability (RAS)INTEL CORP·Filed 2020·Granted Feb 25, 2025·3 cites·20 claims
- 4391US7872892B2Identifying and accessing individual memory devices in a memory channelINTEL CORP·Filed 2005·Granted Jan 18, 2011·21 cites·15 claims
- 4491US7386765B2Memory device having error checking and correctionINTEL CORP·Filed 2003·Granted Jun 10, 2008·72 cites·12 claims
- 4590US9811420B2Extracting selective information from on-die dynamic random access memory (DRAM) error correction code (ECC)INTEL CORP·Filed 2015·Granted Nov 7, 2017·7 cites·16 claims
- 4690US9053812B2Fast exit from DRAM self-refreshBAINS KULJIT S·Filed 2012·Granted Jun 9, 2015·11 cites·14 claims
- 4790US8484410B2Method to stagger self refreshesBAINS KULJIT S·Filed 2010·Granted Jul 9, 2013·14 cites·23 claims
- 4890US6996749B1Method and apparatus for providing debug functionality in a buffered memory channelINTEL CORP·Filed 2003·Granted Feb 7, 2006·48 cites·25 claims
- 4989US9721641B2Apparatus, method and system for memory device access with a multi-cycle commandINTEL CORP·Filed 2013·Granted Aug 1, 2017·9 cites·22 claims
- 5088US9804793B2Techniques for a write zero operationINTEL CORP·Filed 2016·Granted Oct 31, 2017·7 cites·25 claims
Showing the top 50 of 250 patent records by PatentIndex Score.
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