Inventor · disambiguated record
Thaddeus Clay Mccracken
Also filed as: MCCRACKEN THADDEUS C · MCCRACKEN THADDEUS CLAY
15 granted patents·1 pending application·84 citations·filing 2007–2013
92Inventor score
Technology areasG06F
Files withCADENCE DESIGN SYSTEMS INC8MCCRACKEN THADDEUS CLAY3JAROSZ JOSEPH P2CANDENCE DESIGN SYSTEMS INC1MCGOWAN MILES P1
Top patents by PatentIndex Score
16 records- 0189US9141743B1Methods, systems, and articles of manufacture for providing evolving information in generating a physical design with custom connectivity using force models and design space decompositionCANDENCE DESIGN SYSTEMS INC·Filed 2013·Granted Sep 22, 2015·19 cites·23 claims
- 0286US8918751B1Methods, systems, and articles of manufacture for implementing physical design decomposition with custom connectivityCADENCE DESIGN SYSTEMS INC·Filed 2013·Granted Dec 23, 2014·9 cites·31 claims
- 0384US9098667B1Methods, systems, and articles of manufacture for implementing physical designs with force directed placement or floorplanning and layout decompositionCADENCE DESIGN SYSTEMS INC·Filed 2013·Granted Aug 4, 2015·9 cites·25 claims
- 0480US7603643B2Method and system for conducting design explorations of an integrated circuitCADENCE DESIGN SYSTEMS INC·Filed 2007·Granted Oct 13, 2009·12 cites·24 claims
- 0579US8443323B1Method and system for implementing a structure to implement I/O rings and die area estimationsMCGOWAN MILES P·Filed 2010·Granted May 14, 2013·7 cites·48 claims
- 0676US9043742B1Methods, systems, and articles of manufacture for implementing physical design using force models with custom connectivityCADENCE DESIGN SYSTEMS INC·Filed 2013·Granted May 26, 2015·4 cites·44 claims
- 0774US8549457B1Method and system for implementing core placementMOORE TIMOTHY P·Filed 2011·Granted Oct 1, 2013·6 cites·33 claims
- 0874US8386981B1Method and systems for implementing I/O rings and die area estimationsCADENCE DESIGN SYSTEMS INC·Filed 2010·Granted Feb 26, 2013·3 cites·49 claims
- 0968US8677307B1Method and system for implementing die size adjustment and visualizationJAROSZ JOSEPH P·Filed 2011·Granted Mar 18, 2014·3 cites·27 claims
- 1068US8375344B1Method and system for determining configurationsCADENCE DESIGN SYSTEMS INC·Filed 2010·Granted Feb 12, 2013·3 cites·30 claims
- 1167US9135373B1Method and system for implementing an interface for I/O ringsJAROSZ JOSEPH P·Filed 2011·Granted Sep 15, 2015·3 cites·36 claims
- 1267US8516433B1Method and system for mapping memory when selecting an electronic productMCCRACKEN THADDEUS CLAY·Filed 2010·Granted Aug 20, 2013·3 cites·30 claims
- 1361US8683412B1Method and system for optimizing placement of I/O element nodes of an I/O ring for an electronic designMCCRACKEN THADDEUS CLAY·Filed 2010·Granted Mar 25, 2014·1 cites·36 claims
- 1460US8051397B2Method and system for conducting design explorations of an integrated circuitCADENCE DESIGN SYSTEMS INC·Filed 2009·Granted Nov 1, 2011·2 cites·21 claims
- 1548US8261215B2Method and system for performing cell modeling and selectionMCCRACKEN THADDEUS CLAY·Filed 2008·Granted Sep 4, 2012·0 cites·31 claims
- 1646US2010161303A1Method, system, computer program product, and user interface for performing power inferenceCADENCE DESIGN SYSTEMS INC·Filed 2008·Application pending·0 cites
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