P

Inventor

BOLZ JEFFREY A

US34 patents
⚠️ This page may combine multiple inventors who share the name “BOLZ JEFFREY A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

NVIDIA CORP

21 patents
US10535114B2Jan 14, 2020

Controlling multi-pass rendering sequences in a cache tiling architecture

NVIDIA CORP89 citations98
US7969444B1Jun 28, 2011

Distributed rendering of texture data

NVIDIA CORP61 citations95
US9767600B2Sep 19, 2017

Target independent rasterization with multiple color samples

NVIDIA CORP3 citations73
US9558573B2Jan 31, 2017

Optimizing triangle topology for path rendering

NVIDIA CORP5 citations73
US9390464B2Jul 12, 2016

Stencil buffer data compression

NVIDIA CORP4 citations72
US9595075B2Mar 14, 2017

Load/store operations in texture hardware

NVIDIA CORP3 citations70
US9384570B2Jul 5, 2016

Efficient setup and evaluation of filled cubic bezier paths

NVIDIA CORP2 citations63
US9342891B2May 17, 2016

Stencil then cover path rendering with shared edges

NVIDIA CORP2 citations63
US7619631B1Nov 17, 2009

Methods and systems for performing anti-aliasing operations with multiple graphics processing units

NVIDIA CORP2 citations63
US10083036B2Sep 25, 2018

Techniques for managing graphics processing resources in a tile-based architecture

NVIDIA CORP0 citations62
US10032242B2Jul 24, 2018

Managing deferred contexts in a cache tiling architecture

NVIDIA CORP0 citations61
US10417990B2Sep 17, 2019

Efficient binding of resource groups in a graphics application programming interface

NVIDIA CORP0 citations52
US10083514B2Sep 25, 2018

Stencil-then-cover path rendering with shared edges

NVIDIA CORP0 citations52
US9773341B2Sep 26, 2017

Rendering cover geometry without internal edges

NVIDIA CORP0 citations52
US9466115B2Oct 11, 2016

Stencil then cover path rendering with shared edges

NVIDIA CORP0 citations52
US9418437B2Aug 16, 2016

Stencil then cover path rendering with shared edges

NVIDIA CORP0 citations52
US9489245B2Nov 8, 2016

Work-queue-based graphics processing unit work creation

NVIDIA CORP1 citations49
US10607390B2Mar 31, 2020

Techniques for tiling compute work with graphics work

NVIDIA CORP0 citations42
US9754561B2Sep 5, 2017

Managing memory regions to support sparse mappings

NVIDIA CORP0 citations40
US9135081B2Sep 15, 2015

Work-queue-based graphics processing unit work creation

NVIDIA CORP0 citations39
US10187663B2Jan 22, 2019

Technique for performing variable width data compression using a palette of encodings

NVIDIA CORP0 citations37

BOLZ JEFFREY A

9 patents

BROWN PATRICK R

1 patent

LICHTENBELT BARTHOLD B

1 patent

HALL JESSE DAVID

1 patent

WEXLER DANIEL ELLIOT

1 patent