Inventor · disambiguated record
Chin-Te Wang
Also filed as: WANG CHIN-TE
6 granted patents·2 pending applications·42 citations·filing 2009–2025
80Inventor score
Technology areasH10W
Files withTAIWAN SEMICONDUCTOR MFG CO LTD5CHANG EDWARD YI1TAIWAN SEMICONDUCTOR MANUFACTORING CO LTD1UNIV NAT CHIAO TUNG1
Top patents by PatentIndex Score
8 records- 0195US9972581B1Routing design of dummy metal cap and redistribution lineTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted May 15, 2018·14 cites·20 claims
- 0295US9812426B1Integrated fan-out package, semiconductor device, and method of fabricating the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Nov 7, 2017·19 cites·20 claims
- 0393US10354961B2Routing design of dummy metal cap and redistribution lineTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Jul 16, 2019·8 cites·20 claims
- 0479US2025357234A1PACKAGING OF DIES INCLUDING TSVs USING SACRIFICIAL CARRIERTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 0573US11031352B2Routing design of dummy metal cap and redistribution lineTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Jun 8, 2021·1 cites·20 claims
- 0669US2024339370A1Packaging of Dies Including TSVs using Sacrificial CarrierTAIWAN SEMICONDUCTOR MANUFACTORING CO LTD·Filed 2023·Application pending·0 cites
- 0750US8033039B2High frequency flip chip package process of polymer substrate and structure thereofUNIV NAT CHIAO TUNG·Filed 2009·Granted Oct 11, 2011·0 cites·7 claims
- 0846US8258606B2High frequency flip chip package structure of polymer substrateCHANG EDWARD-YI·Filed 2011·Granted Sep 4, 2012·0 cites·5 claims
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →