Inventor · disambiguated record
Charles Rosenstein
Also filed as: ROSENSTEIN CHARLES
10 granted patents·1 pending application·267 citations·filing 2006–2015
89Inventor score
Technology areasH10W
Top patents by PatentIndex Score
11 records- 0197US7935568B2Wafer-level fabrication of lidded chips with electrodeposited dielectric coatingTESSERA TECH IRELAND LTD·Filed 2006·Granted May 3, 2011·74 cites·28 claims
- 0296US7791199B2Packaged semiconductor chipsTESSERA INC·Filed 2006·Granted Sep 7, 2010·49 cites·8 claims
- 0394US7936062B2Wafer level chip packagingTESSERA TECH IRELAND LTD·Filed 2007·Granted May 3, 2011·75 cites·23 claims
- 0493US7807508B2Wafer-level fabrication of lidded chips with electrodeposited dielectric coatingTESSERA TECH HUNGARY KFT·Filed 2007·Granted Oct 5, 2010·62 cites·21 claims
- 0578US9548254B2Packaged semiconductor chips with arrayTESSERA INC·Filed 2015·Granted Jan 17, 2017·2 cites·15 claims
- 0678US8653644B2Packaged semiconductor chips with arrayGRINMAN ANDREY·Filed 2012·Granted Feb 18, 2014·4 cites·60 claims
- 0758US8053281B2Method of forming a wafer level packageTESSERA INC·Filed 2008·Granted Nov 8, 2011·1 cites·13 claims
- 0857US9070678B2Packaged semiconductor chips with arrayTESSERA INC·Filed 2014·Granted Jun 30, 2015·0 cites·19 claims
- 0949US8569876B2Packaged semiconductor chips with arrayGRINMAN ANDREY·Filed 2006·Granted Oct 29, 2013·0 cites·94 claims
- 1044US8704347B2Packaged semiconductor chipsGRINMAN ANDREY·Filed 2010·Granted Apr 22, 2014·0 cites·20 claims
- 1140US2007190747A1Wafer level packaging to lidded chipsTESSERA TECH HUNGARY KFT·Filed 2007·Application pending·0 cites
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