Inventor · disambiguated record
Ramacharan Sundararaman
Also filed as: SUNDARARAMAN RAMACHARAN · SUNDARARAMAN RAMACHARAN CHARAN
33 granted patents·5 pending applications·143 citations·filing 2000–2024
95Inventor score
Top patents by PatentIndex Score
38 records- 0196US9170955B2Providing extended cache replacement state informationINTEL CORP·Filed 2012·Granted Oct 27, 2015·59 cites·23 claims
- 0294US11635739B1System and method to manage power to a desired power profileMARVELL ASIA PTE LTD·Filed 2020·Granted Apr 25, 2023·3 cites·29 claims
- 0394US11340673B1System and method to manage power throttlingMARVELL ASIA PTE LTD·Filed 2020·Granted May 24, 2022·5 cites·25 claims
- 0492US11921904B1System and methods for firmware security mechanismMARVELL ASIA PTE LTD·Filed 2020·Granted Mar 5, 2024·5 cites·30 claims
- 0589US11586446B1System and methods for hardware-based PCIe link up based on post silicon characterizationMARVELL ASIA PTE LTD·Filed 2021·Granted Feb 21, 2023·2 cites·21 claims
- 0688US12498912B1System and methods for firmware update mechanismMARVELL ASIA PTE LTD·Filed 2021·Granted Dec 16, 2025·2 cites·27 claims
- 0788US11829492B1System and method for hardware-based register protection mechanismMARVELL ASIA PTE LTD·Filed 2021·Granted Nov 28, 2023·2 cites·30 claims
- 0886US11095556B2Techniques to support multiple protocols between computer system interconnectsINTEL CORP·Filed 2017·Granted Aug 17, 2021·5 cites·25 claims
- 0984US8533436B2Adaptively handling remote atomic execution based upon contention predictionFRYMAN JOSHUA B·Filed 2009·Granted Sep 10, 2013·17 cites·20 claims
- 1083US11334258B2System and method for memory region protectionMARVELL ASIA PTE LTD·Filed 2021·Granted May 17, 2022·2 cites·26 claims
- 1182US11204867B2PCIe controller with extensions to provide coherent memory mapping between accelerator memory and host memoryINTEL CORP·Filed 2017·Granted Dec 21, 2021·3 cites·25 claims
- 1282US9785556B2Cross-die interface snoop or global observation message orderingINTEL CORP·Filed 2014·Granted Oct 10, 2017·7 cites·26 claims
- 1381US12174757B1Apparatus and methods for reducing latencies associated with link state transitions within die interconnect architecturesQUALCOMM INC·Filed 2023·Granted Dec 24, 2024·1 cites·28 claims
- 1481US11927932B2System and method to manage power to a desired power profileMARVELL ASIA PTE LTD·Filed 2023·Granted Mar 12, 2024·0 cites·36 claims
- 1580US8145878B2Accessing control and status register (CSR)SUNDARARAMAN RAMACHARAN·Filed 2007·Granted Mar 27, 2012·25 cites·22 claims
- 1670US11836501B1System and methods for hardware-based PCIe link up based on post silicon characterizationMARVELL ASIA PTE LTD·Filed 2023·Granted Dec 5, 2023·0 cites·21 claims
- 1770US9875185B2Memory sequencing with coherent and non-coherent sub-systemsINTEL CORP·Filed 2014·Granted Jan 23, 2018·2 cites·20 claims
- 1869US11687136B2System and method to manage power throttlingMARVELL ASIA PTE LTD·Filed 2022·Granted Jun 27, 2023·0 cites·27 claims
- 1967US11734608B2Address interleaving for machine learningMARVELL ASIA PTE LTD·Filed 2020·Granted Aug 22, 2023·0 cites·16 claims
- 2066US11782866B2Techniques to support mulitple interconnect protocols for an interconnectINTEL CORP·Filed 2022·Granted Oct 10, 2023·0 cites·20 claims
- 2164US11729096B2Techniques to support multiple protocols between computer system interconnectsINTEL CORP·Filed 2021·Granted Aug 15, 2023·0 cites·21 claims
- 2261US10929778B1Address interleaving for machine learningMARVELL ASIA PTE LTD·Filed 2019·Granted Feb 23, 2021·0 cites·18 claims
- 2360US12430280B2Mechanism to improve the reliability of sideband in chipletsQUALCOMM INC·Filed 2023·Granted Sep 30, 2025·0 cites·27 claims
- 2460US9367329B2Initialization of multi-core processing systemCHANG STEVEN S·Filed 2011·Granted Jun 14, 2016·1 cites·18 claims
- 2559US2025189385A1Communication of thermal states for chipletsQUALCOMM INC·Filed 2023·Application pending·0 cites
- 2658US9658861B2Boot strap processor assignment for a multi-core processing unitCHANG STEVEN S·Filed 2011·Granted May 23, 2017·1 cites·15 claims
- 2755US10261904B2Memory sequencing with coherent and non-coherent sub-systemsINTEL CORP·Filed 2017·Granted Apr 16, 2019·0 cites·18 claims
- 2853US2025363282A1Alternative mainband modeQUALCOMM INC·Filed 2024·Application pending·0 cites
- 2953US2025306658A1Power management message aggregationQUALCOMM INC·Filed 2024·Application pending·0 cites
- 3052US12292978B1System and method for SRAM less electronic device bootup using cacheMARVELL ASIA PTE LTD·Filed 2021·Granted May 6, 2025·0 cites·26 claims
- 3151US2019004990A1Techniques to support mulitple interconnect protocols for an interconnectVAN DOREN STEPHEN R·Filed 2017·Application pending·0 cites
- 3247US6772293B2System and method for optimizing memory bus bandwidth utilization by request classification and orderingINTEL CORP·Filed 2000·Granted Aug 3, 2004·1 cites·21 claims
- 3346US11868475B1System and methods for latency reduction for fuse reload post resetMARVELL ASIA PTE LTD·Filed 2020·Granted Jan 9, 2024·0 cites·25 claims
- 3445US9430389B2Prefetch with request for ownership without dataCORBAL JESUS·Filed 2011·Granted Aug 30, 2016·0 cites·22 claims
- 3545US9389657B2Reset of multi-core processing systemCHANG STEVEN S·Filed 2011·Granted Jul 12, 2016·0 cites·19 claims
- 3645US9208124B2Reset of processing core in multi-core processing systemCHANG STEVEN S·Filed 2011·Granted Dec 8, 2015·0 cites·17 claims
- 3742US9372816B2Advanced programmable interrupt controller identifier (APIC ID) assignment for a multi-core processing unitCHANG STEVEN S·Filed 2011·Granted Jun 21, 2016·0 cites·19 claims
- 3833US2014189255A1Method and apparatus to share modified data without write-back in a shared-memory many-core systemSUNDARARAMAN RAMACHARAN·Filed 2012·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →