Inventor · disambiguated record
Iain Robertson
Also filed as: AGARWALA SANJIVE · ROBERTSON IAIN · ROBERTSON IAIN C · ROBERTSON IAIN CRAIG
67 granted patents·1 pending application·1,273 citations·filing 1989–2020
99Inventor score
Files withTEXAS INSTRUMENTS INC49SIEMENS IND SOFTWARE INC6ULTRASOC TECH LIMITED6ULTRASOC TECHNOLOGIES LTD5ORACLE AMERICA INC1
Top patents by PatentIndex Score
68 records- 0192US9191194B2Data transfer clock recovery for legacy systemsTEXAS INSTRUMENTS INC·Filed 2013·Granted Nov 17, 2015·11 cites·9 claims
- 0292US6496740B1Transfer controller with hub and ports architectureTEXAS INSTRUMENTS INC·Filed 2000·Granted Dec 17, 2002·85 cites·13 claims
- 0390US6185629B1Data transfer controller employing differing memory interface protocols dependent upon external input at predetermined timeTEXAS INSTRUMENTS INC·Filed 1994·Granted Feb 6, 2001·155 cites·20 claims
- 0485US9188638B2Functional testing of an integrated circuit chipULTRASOC TECHNOLOGIES LTD·Filed 2014·Granted Nov 17, 2015·5 cites·18 claims
- 0585US6614276B2Flip-flop designTEXAS INSTRUMENTS INC·Filed 2001·Granted Sep 2, 2003·31 cites·5 claims
- 0685US6314047B1Low cost alternative to large dual port RAMTEXAS INSTRUMENTS INC·Filed 2000·Granted Nov 6, 2001·41 cites·14 claims
- 0784US6868087B1Request queue manager in transfer controller with hub and portsTEXAS INSTRUMENTS INC·Filed 2000·Granted Mar 15, 2005·44 cites·19 claims
- 0884US6681270B1Effective channel priority processing for transfer controller with hub and portsTEXAS INSTRUMENTS INC·Filed 2000·Granted Jan 20, 2004·39 cites·10 claims
- 0982US11221901B2Monitoring processors operating in lockstepULTRASOC TECH LIMITED·Filed 2019·Granted Jan 11, 2022·3 cites·22 claims
- 1081US6493818B2Technique for pipelining synchronization to maintain throughput across two asynchronous clock domain boundariesTEXAS INSTRUMENTS INC·Filed 2000·Granted Dec 10, 2002·31 cites·5 claims
- 1179US5546553AMultifunctional access devices, systems and methodsTEXAS INSTRUMENTS INC·Filed 1994·Granted Aug 13, 1996·37 cites·43 claims
- 1278US5524265AArchitecture of transfer processorTEXAS INSTRUMENTS INC·Filed 1994·Granted Jun 4, 1996·80 cites·9 claims
- 1377US5696924AMemory access circuit with address translation performing auto increment of translated address on writes and return to translated address on readsTEXAS INSTRUMENTS INC·Filed 1995·Granted Dec 9, 1997·37 cites·4 claims
- 1476US6839831B2Data processing apparatus with register file bypassTEXAS INSTRUMENTS INC·Filed 2000·Granted Jan 4, 2005·24 cites·25 claims
- 1575US5956744AMemory configuration cache with multilevel hierarchy least recently used cache entry replacementTEXAS INSTRUMENTS INC·Filed 1996·Granted Sep 21, 1999·76 cites·34 claims
- 1674US6690668B1Modular interconnection of network switchesTEXAS INSTRUMENTS INC·Filed 1999·Granted Feb 10, 2004·89 cites·4 claims
- 1774US6658503B1Parallel transfer size calculation and annulment determination in transfer controller with hub and portsTEXAS INSTRUMENTS INC·Filed 2000·Granted Dec 2, 2003·20 cites·4 claims
- 1874US6574683B1External direct memory access processor implementation that includes a plurality of priority levels stored in request queueTEXAS INSTRUMENTS INC·Filed 2000·Granted Jun 3, 2003·20 cites·18 claims
- 1972US6378032B1Bank conflict avoidance in multi-bank DRAMS with shared sense amplifiersTEXAS INSTRUMENTS INC·Filed 2000·Granted Apr 23, 2002·17 cites·25 claims
- 2071US9140753B2Monitoring functional testing of an integrated circuit chipULTRASOC TECHNOLOGIES LTD·Filed 2014·Granted Sep 22, 2015·2 cites·20 claims
- 2171US6621818B1Ring configuration for network switchesTEXAS INSTRUMENTS INC·Filed 1999·Granted Sep 16, 2003·72 cites·13 claims
- 2270US9424166B2Routing debug messagesULTRASOC TECHNOLOGIES LTD·Filed 2014·Granted Aug 23, 2016·2 cites·20 claims
- 2370US7975082B2System and method to facilitate deterministic testing of data transfers between independent clock domains on a chipORACLE AMERICA INC·Filed 2009·Granted Jul 5, 2011·6 cites·16 claims
- 2470US5850632AMemory access controller utilizing cache memory to store configuration informationTEXAS INSTRUMENTS INC·Filed 1996·Granted Dec 15, 1998·57 cites·34 claims
- 2569US10394721B2Integrated circuit securityULTRASOC TECHNOLOGIES LTD·Filed 2016·Granted Aug 27, 2019·2 cites·16 claims
- 2669US7027447B2Communications interface between clock domains with minimal latencyTEXAS INSTRUMENTS INC·Filed 2001·Granted Apr 11, 2006·13 cites·15 claims
- 2767US6904474B1Using write request queue to prevent bottlenecking on slow ports in transfer controller with hub and ports architectureTEXAS INSTRUMENTS INC·Filed 2000·Granted Jun 7, 2005·13 cites·19 claims
- 2866US7873886B2PC-connectivity for on-chip memoryTEXAS INSTRUMENTS INC·Filed 2006·Granted Jan 18, 2011·3 cites·27 claims
- 2966US7236552B2Data transmissionTEXAS INSTRUMENTS INC·Filed 2003·Granted Jun 26, 2007·10 cites·9 claims
- 3064US6654834B1Method and apparatus for data transfer employing closed loop of memory nodesTEXAS INSTRUMENTS INC·Filed 2000·Granted Nov 25, 2003·11 cites·46 claims
- 3163US11928007B2Monitoring processors operating in lockstepSIEMENS IND SOFTWARE INC·Filed 2020·Granted Mar 12, 2024·0 cites·22 claims
- 3261US6892253B2Maintaining remote queue using two counters in transfer controller with hub and portsTEXAS INSTRUMENTS INC·Filed 2001·Granted May 10, 2005·8 cites·11 claims
- 3361US6654819B1External direct memory access processor interface to centralized transaction processorTEXAS INSTRUMENTS INC·Filed 2000·Granted Nov 25, 2003·8 cites·16 claims
- 3461US5724599AMessage passing and blast interrupt from processorTEXAS INSTRUMENTS INC·Filed 1994·Granted Mar 3, 1998·36 cites·28 claims
- 3560US5237672ADynamically adaptable memory controller for various size memoriesTEXAS INSTRUMENTS INC·Filed 1989·Granted Aug 17, 1993·27 cites·6 claims
- 3659US11095474B2Packet data protocolULTRASOC TECH LIMITED·Filed 2019·Granted Aug 17, 2021·0 cites·20 claims
- 3759US5696923AGraphics processor writing to shadow register at predetermined address simultaneously with writing to control registerTEXAS INSTRUMENTS INC·Filed 1995·Granted Dec 9, 1997·20 cites·5 claims
- 3857US11411759B2Emulating broadcast in a network on chipSIEMENS IND SOFTWARE INC·Filed 2020·Granted Aug 9, 2022·0 cites·20 claims
- 3957US5651127AGuided transfers with variable steppingTEXAS INSTRUMENTS INC·Filed 1994·Granted Jul 22, 1997·32 cites·24 claims
- 4056US9632138B2Functional testing of an integrated circuit chipULTRASOC TECHNOLOGIES LTD·Filed 2015·Granted Apr 25, 2017·0 cites·38 claims
- 4156US7047284B1Transfer request bus node for transfer controller with hub and portsTEXAS INSTRUMENTS INC·Filed 2000·Granted May 16, 2006·5 cites·10 claims
- 4255US10326612B2Packet data protocolULTRASOC TECH LIMITED·Filed 2016·Granted Jun 18, 2019·0 cites·14 claims
- 4353US7233628B2Data transmissionTEXAS INSTRUMENTS INC·Filed 2003·Granted Jun 19, 2007·2 cites·26 claims
- 4452US7243281B2Serial burn-in monitorTEXAS INSTRUMENTS INC·Filed 2005·Granted Jul 10, 2007·1 cites·4 claims
- 4552US6954468B1Write allocation counter for transfer controller with hub and portsTEXAS INSTRUMENTS INC·Filed 2000·Granted Oct 11, 2005·2 cites·14 claims
- 4652US6651083B1Distributed service request system for providing fair arbitration using token passing scheme to resolve collisionsTEXAS INSTRUMENTS INC·Filed 2000·Granted Nov 18, 2003·3 cites·19 claims
- 4752US6189077B1Two computer access circuit using address translation into common register fileTEXAS INSTRUMENTS INC·Filed 1995·Granted Feb 13, 2001·15 cites·6 claims
- 4851US11907100B2Generation of trace messages including an instruction retirement count and a stall countSIEMENS IND SOFTWARE INC·Filed 2020·Granted Feb 20, 2024·0 cites·17 claims
- 4951US11704265B2Message monitoringSIEMENS IND SOFTWARE INC·Filed 2020·Granted Jul 18, 2023·0 cites·12 claims
- 5050US11429459B2Broadcasting event messages in a System on Chip using a crosslinked tree structureSIEMENS IND SOFTWARE INC·Filed 2020·Granted Aug 30, 2022·0 cites·18 claims
Showing the top 50 of 68 patent records by PatentIndex Score.
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