Inventor · disambiguated record
Ebrahim Andideh
Also filed as: ANDIDEH EBRAHIM
70 granted patents·21 pending applications·2,891 citations·filing 1992–2017
99Inventor score
Top patents by PatentIndex Score
91 records- 0199US6437444B2Interlayer dielectric with a composite dielectric stackINTEL CORP·Filed 2000·Granted Aug 20, 2002·530 cites·6 claims
- 0298US5953635AInterlayer dielectric with a composite dielectric stackINTEL CORP·Filed 1996·Granted Sep 14, 1999·316 cites·9 claims
- 0396US6506692B2Method of making a semiconductor device using a silicon carbide hard maskINTEL CORP·Filed 2001·Granted Jan 14, 2003·116 cites·6 claims
- 0495US6765273B1Device structure and method for reducing silicide encroachmentINTEL CORP·Filed 1998·Granted Jul 20, 2004·240 cites·3 claims
- 0595US6235568B1Semiconductor device having deposited silicon regions and a method of fabricationINTEL CORP·Filed 1999·Granted May 22, 2001·303 cites·30 claims
- 0694US6624032B2Structure and process flow for fabrication of dual gate floating body integrated MOS transistorsINTEL CORP·Filed 2002·Granted Sep 23, 2003·85 cites·13 claims
- 0793US6121100AMethod of fabricating a MOS transistor with a raised source/drain extensionINTEL CORP·Filed 1997·Granted Sep 19, 2000·147 cites·12 claims
- 0892US5270264AProcess for filling submicron spaces with dielectricINTEL CORP·Filed 1992·Granted Dec 14, 1993·150 cites·19 claims
- 0991US6777759B1Device structure and method for reducing silicide encroachmentINTEL CORP·Filed 2000·Granted Aug 17, 2004·58 cites·5 claims
- 1090US6448185B1Method for making a semiconductor device that has a dual damascene interconnectINTEL CORP·Filed 2001·Granted Sep 10, 2002·49 cites·15 claims
- 1190US6362091B1Method for making a semiconductor device having a low-k dielectric layerINTEL CORP·Filed 2000·Granted Mar 26, 2002·68 cites·9 claims
- 1288US7755124B2Laminating magnetic materials in a semiconductor deviceINTEL CORP·Filed 2006·Granted Jul 13, 2010·18 cites·23 claims
- 1388US6392271B1Structure and process flow for fabrication of dual gate floating body integrated MOS transistorsINTEL CORP·Filed 1999·Granted May 21, 2002·64 cites·7 claims
- 1488US6316063B1Method for preparing carbon doped oxide insulating layersINTEL CORP·Filed 1999·Granted Nov 13, 2001·76 cites·18 claims
- 1583US7034380B2Low-dielectric constant structure with a multilayer stack of thin films with poresINTEL CORP·Filed 2003·Granted Apr 25, 2006·24 cites·11 claims
- 1683US6846737B1Plasma induced depletion of fluorine from surfaces of fluorinated low-k dielectric materialsINTEL CORP·Filed 2000·Granted Jan 25, 2005·24 cites·36 claims
- 1783US6677253B2Carbon doped oxide depositionINTEL CORP·Filed 2001·Granted Jan 13, 2004·25 cites·16 claims
- 1883US6274913B1Shielded channel transistor structure with embedded source/drain junctionsINTEL CORP·Filed 1998·Granted Aug 14, 2001·62 cites·9 claims
- 1982US9633837B2Methods of providing dielectric to conductor adhesion in package structuresINTEL CORP·Filed 2015·Granted Apr 25, 2017·3 cites·16 claims
- 2082US6630390B2Method of forming a semiconductor device using a carbon doped oxide layer to control the chemical mechanical polishing of a dielectric layerINTEL CORP·Filed 2003·Granted Oct 7, 2003·22 cites·2 claims
- 2182US6482754B1Method of forming a carbon doped oxide layer on a substrateINTEL CORP·Filed 2001·Granted Nov 19, 2002·29 cites·15 claims
- 2282US6380010B2Shielded channel transistor structure with embedded source/drain junctionsINTEL CORP·Filed 2001·Granted Apr 30, 2002·30 cites·8 claims
- 2381US6093651APolish pad with non-uniform groove depth to improve wafer polish rate uniformityINTEL CORP·Filed 1997·Granted Jul 25, 2000·40 cites·25 claims
- 2479US9520350B2Bumpless build-up layer (BBUL) semiconductor package with ultra-thin dielectric layerTEH WENG HONG·Filed 2013·Granted Dec 13, 2016·5 cites·15 claims
- 2579US5672095AElimination of pad conditioning in a chemical mechanical polishing processINTEL CORP·Filed 1995·Granted Sep 30, 1997·45 cites·26 claims
- 2676US6518155B1Device structure and method for reducing silicide encroachmentINTEL CORP·Filed 1997·Granted Feb 11, 2003·43 cites·7 claims
- 2776US6350670B1Method for making a semiconductor device having a carbon doped oxide insulating layerINTEL CORP·Filed 1999·Granted Feb 26, 2002·49 cites·15 claims
- 2875US10367470B2Wafer-level-packaged BAW devices with surface mount connection structuresQORVO US INC·Filed 2017·Granted Jul 30, 2019·2 cites·35 claims
- 2973US7595203B2Ferroelectric memory device with a conductive polymer layer and a method of formationINTEL CORP·Filed 2007·Granted Sep 29, 2009·3 cites·11 claims
- 3072US6914335B2Semiconductor device having a low-K dielectric layerINTEL CORP·Filed 2002·Granted Jul 5, 2005·16 cites·11 claims
- 3171US9136221B2Methods of providing dielectric to conductor adhesion in package structuresINTEL CORP·Filed 2012·Granted Sep 15, 2015·2 cites·21 claims
- 3269US7009272B2PECVD air gap integrationINTEL CORP·Filed 2002·Granted Mar 7, 2006·19 cites·16 claims
- 3369US7001782B1Method and apparatus for filling interlayer vias on ferroelectric polymer substratesINTEL CORP·Filed 2003·Granted Feb 21, 2006·14 cites·24 claims
- 3469US6680262B2Method of making a semiconductor device by converting a hydrophobic surface of a dielectric layer to a hydrophilic surfaceINTEL CORP·Filed 2001·Granted Jan 20, 2004·13 cites·6 claims
- 3569US6548399B1Method of forming a semiconductor device using a carbon doped oxide layer to control the chemical mechanical polishing of a dielectric layerINTEL CORP·Filed 2001·Granted Apr 15, 2003·10 cites·2 claims
- 3668US6191050B1Interlayer dielectric with a composite dielectric stackINTEL CORP·Filed 1999·Granted Feb 20, 2001·25 cites·6 claims
- 3767US6951764B2Ferroelectric memory device with a conductive polymer layer and a method of formationINTEL CORP·Filed 2004·Granted Oct 4, 2005·8 cites·11 claims
- 3867US6664168B1Method of making an on-die decoupling capacitor for a semiconductor deviceINTEL CORP·Filed 2002·Granted Dec 16, 2003·12 cites·3 claims
- 3965US7396692B2Method for increasing ferroelectric characteristics of polymer memory cellsINTEL CORP·Filed 2003·Granted Jul 8, 2008·14 cites·20 claims
- 4065US6887780B2Concentration graded carbon doped oxideINTEL CORP·Filed 2001·Granted May 3, 2005·8 cites·5 claims
- 4164US7091615B2Concentration graded carbon doped oxideINTEL CORP·Filed 2005·Granted Aug 15, 2006·1 cites·7 claims
- 4262US6417098B1Enhanced surface modification of low K carbon-doped oxideINTEL CORP·Filed 1999·Granted Jul 9, 2002·29 cites·8 claims
- 4361US6951506B2Polish pad with non-uniform groove depth to improve wafer polish rate uniformityINTEL CORP·Filed 1999·Granted Oct 4, 2005·16 cites·5 claims
- 4461US6596646B2Method for making a sub 100 nanometer semiconductor device using conventional lithography stepsINTEL CORP·Filed 2001·Granted Jul 22, 2003·7 cites·11 claims
- 4560US6800548B2Method to avoid via poisoning in dual damascene processINTEL CORP·Filed 2002·Granted Oct 5, 2004·9 cites·18 claims
- 4658US6593650B2Plasma induced depletion of fluorine from surfaces of fluorinated low-k dielectric materialsINTEL CORP·Filed 2002·Granted Jul 15, 2003·5 cites·7 claims
- 4758US5877072AProcess for forming doped regions from solid phase diffusion sourceINTEL CORP·Filed 1997·Granted Mar 2, 1999·22 cites·20 claims
- 4854US7223613B2Ferroelectric polymer memory with a thick interface layerINTEL CORP·Filed 2004·Granted May 29, 2007·4 cites·15 claims
- 4954US7170122B2Ferroelectric polymer memory with a thick interface layerINTEL CORP·Filed 2003·Granted Jan 30, 2007·4 cites·20 claims
- 5053US7078754B2Methods and apparatuses for producing a polymer memory deviceINTEL CORP·Filed 2004·Granted Jul 18, 2006·4 cites·11 claims
Showing the top 50 of 91 patent records by PatentIndex Score.
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