Inventor · disambiguated record
Chin-Chi Teng
Also filed as: TENG CHIN-CHI
7 granted patents·1 pending application·185 citations·filing 1999–2003
87Inventor score
Technology areasG06F
Top patents by PatentIndex Score
8 records- 0183US6751786B2Clock tree synthesis for a hierarchically partitioned IC layoutCADENCE DESIGN SYSTEMS INC·Filed 2002·Granted Jun 15, 2004·41 cites·15 claims
- 0281US6782519B2Clock tree synthesis for mixed domain clocksCADENCE DESIGN SYSTEMS INC·Filed 2002·Granted Aug 24, 2004·36 cites·14 claims
- 0379US6763513B1Clock tree synthesizer for balancing reconvergent and crossover clock treesCADENCE DESIGN SYSTEMS INC·Filed 2002·Granted Jul 13, 2004·29 cites·22 claims
- 0477US7051310B2Two-stage clock tree synthesis with buffer distribution balancingCADENCE DESIGN SYSTEMS INC·Filed 2003·Granted May 23, 2006·38 cites·34 claims
- 0565US7082587B2Method of estimating path delays in an ICCADENCE DESIGN SYSTEMS INC·Filed 2002·Granted Jul 25, 2006·12 cites·16 claims
- 0655US6925619B2IC conductor capacitance estimation methodCADENCE DESIGN SYSTEMS INC·Filed 2003·Granted Aug 2, 2005·5 cites·26 claims
- 0749US6351840B1Method for balancing a clock treeSILICON PERSPECTIVE CORP·Filed 1999·Granted Feb 26, 2002·24 cites·10 claims
- 0842US2003135836A1Gated clock tree synthesisFiled 2002·Application pending·0 cites
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