Inventor · disambiguated record
Marios C. Papaefthymiou
Also filed as: PAPAEFTHYMIOU MARIOS · PAPAEFTHYMIOU MARIOS C
20 granted patents·2 pending applications·451 citations·filing 2003–2012
97Inventor score
Files withUNIV MICHIGAN9CYCLOS SEMICONDUCTOR INC6PAPAEFTHYMIOU MARIOS C5CHUEH JUANG-YING1ISHII ALEXANDER T1
Top patents by PatentIndex Score
22 records- 0197US8659338B2Resonant clock distribution network architecture with programmable driversPAPAEFTHYMIOU MARIOS C·Filed 2010·Granted Feb 25, 2014·19 cites·23 claims
- 0297US8502569B2Architecture for operating resonant clock network in conventional modePAPAEFTHYMIOU MARIOS C·Filed 2010·Granted Aug 6, 2013·22 cites·18 claims
- 0397US8339209B2Method for selecting natural frequency in resonant clock distribution networks with no inductor overheadPAPAEFTHYMIOU MARIOS C·Filed 2010·Granted Dec 25, 2012·18 cites·16 claims
- 0496US8368450B2Architecture for adjusting natural frequency in resonant clock distribution networksCYCLOS SEMICONDUCTOR INC·Filed 2010·Granted Feb 5, 2013·17 cites·13 claims
- 0595US7956664B2Clock distribution network architecture with clock skew managementUNIV MICHIGAN·Filed 2007·Granted Jun 7, 2011·41 cites·84 claims
- 0695US7719316B2Clock distribution network architecture for resonant-clocked systemsUNIV MICHIGAN·Filed 2007·Granted May 18, 2010·39 cites·45 claims
- 0795US7355454B2Energy recovery boost logicUNIV MICHIGAN·Filed 2005·Granted Apr 8, 2008·35 cites·47 claims
- 0894US8400192B2Architecture for frequency-scaled operation in resonant clock distribution networksPAPAEFTHYMIOU MARIOS C·Filed 2010·Granted Mar 19, 2013·18 cites·15 claims
- 0994US8362811B2Architecture for single-stepping in resonant clock distribution networksCYCLOS SEMICONDUCTOR INC·Filed 2010·Granted Jan 29, 2013·19 cites·15 claims
- 1094US8358163B2Resonant clock distribution network architecture for tracking parameter variations in conventional clock distribution networksCYCLOS SEMICONDUCTOR INC·Filed 2010·Granted Jan 22, 2013·11 cites·1 claims
- 1194US7719317B2Clock distribution network architecture with resonant clock gatingUNIV MICHIGAN·Filed 2007·Granted May 18, 2010·30 cites·40 claims
- 1293US9041451B2Resonant clock distribution network architecture for tracking parameter variations in conventional clock distribution networksCYCLOS SEMICONDUCTOR INC·Filed 2012·Granted May 26, 2015·8 cites·19 claims
- 1393US8593183B2Architecture for controlling clock characteristicsPAPAEFTHYMIOU MARIOS C·Filed 2010·Granted Nov 26, 2013·15 cites·17 claims
- 1493US7973565B2Resonant clock and interconnect architecture for digital devices with multiple clock networksCYCLOS SEMICONDUCTOR INC·Filed 2008·Granted Jul 5, 2011·31 cites·26 claims
- 1588US8461873B2Resonant clock and interconnect architecture for digital devices with multiple clock networksISHII ALEXANDER T·Filed 2011·Granted Jun 11, 2013·16 cites·26 claims
- 1688US6777992B2Low-power CMOS flip-flopUNIV MICHIGAN·Filed 2003·Granted Aug 17, 2004·36 cites·24 claims
- 1786US8289063B2Clock distribution network architecture with clock skew managementCHUEH JUANG-YING·Filed 2011·Granted Oct 16, 2012·11 cites·30 claims
- 1882US7622977B2Ramped clock digital storage controlUNIV MICHIGAN·Filed 2006·Granted Nov 24, 2009·11 cites·22 claims
- 1981US6879190B2Low-power driver with energy recoveryUNIV MICHIGAN·Filed 2003·Granted Apr 12, 2005·33 cites·34 claims
- 2075US6742132B2Method and apparatus for generating a clock signal having a driven oscillator circuit formed with energy storage characteristics of a memory storage deviceUNIV MICHIGAN·Filed 2003·Granted May 25, 2004·21 cites·20 claims
- 2157US2013194018A1Method for Selecting Natural Frequency in Resonant Clock Distribution Networks with no Inductor OverheadCYCLOS SEMICONDUCTOR INC·Filed 2012·Application pending·0 cites
- 2240US2014317389A1Computational sprinting using multiple coresUNIV MICHIGAN·Filed 2012·Application pending·0 cites
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