Inventor · disambiguated record
Christopher J. Hughes
Also filed as: HUGHES CHRISTOPHER · HUGHES CHRISTOPHER J · HUGHES CHRISTOPHER JUSTIN
190 granted patents·57 pending applications·1,022 citations·filing 1987–2025
99Inventor score
Top patents by PatentIndex Score
247 records- 0199US11954489B2Systems for performing instructions to quickly convert and use tiles as 1D vectorsINTEL CORP·Filed 2021·Granted Apr 9, 2024·9 cites·43 claims
- 0299US11748103B2Systems and methods for performing matrix compress and decompress instructionsINTEL CORP·Filed 2022·Granted Sep 5, 2023·9 cites·20 claims
- 0399US11714648B2Systems for performing instructions to quickly convert and use tiles as 1D vectorsINTEL CORP·Filed 2021·Granted Aug 1, 2023·9 cites·45 claims
- 0499US11579880B2Systems for performing instructions to quickly convert and use tiles as 1D vectorsINTEL CORP·Filed 2021·Granted Feb 14, 2023·9 cites·25 claims
- 0599US11249761B2Systems and methods for performing matrix compress and decompress instructionsINTEL CORP·Filed 2020·Granted Feb 15, 2022·11 cites·24 claims
- 0699US10719323B2Systems and methods for performing matrix compress and decompress instructionsINTEL CORP·Filed 2018·Granted Jul 21, 2020·56 cites·20 claims
- 0798US11847185B2Systems and methods of instructions to accelerate multiplication of sparse matrices using bitmasks that identify non-zero elementsINTEL CORP·Filed 2021·Granted Dec 19, 2023·7 cites·21 claims
- 0898US11507376B2Systems for performing instructions for fast element unpacking into 2-dimensional registersINTEL CORP·Filed 2021·Granted Nov 22, 2022·10 cites·24 claims
- 0998US11416260B2Systems and methods for implementing chained tile operationsINTEL CORP·Filed 2020·Granted Aug 16, 2022·9 cites·21 claims
- 1098US10990396B2Systems for performing instructions to quickly convert and use tiles as 1D vectorsINTEL CORP·Filed 2018·Granted Apr 27, 2021·32 cites·22 claims
- 1198US10963256B2Systems and methods for performing instructions to transform matrices into row-interleaved formatINTEL CORP·Filed 2018·Granted Mar 30, 2021·25 cites·20 claims
- 1298US10896043B2Systems for performing instructions for fast element unpacking into 2-dimensional registersINTEL CORP·Filed 2018·Granted Jan 19, 2021·34 cites·20 claims
- 1398US10866786B2Systems and methods for performing instructions to transpose rectangular tilesINTEL CORP·Filed 2018·Granted Dec 15, 2020·27 cites·20 claims
- 1497US12020028B2Apparatuses, methods, and systems for 8-bit floating-point matrix dot product instructionsINTEL CORP·Filed 2020·Granted Jun 25, 2024·7 cites·24 claims
- 1597US11972230B2Matrix transpose and multiplyINTEL CORP·Filed 2020·Granted Apr 30, 2024·9 cites·20 claims
- 1697US11941395B2Apparatuses, methods, and systems for instructions for 16-bit floating-point matrix dot product instructionsINTEL CORP·Filed 2020·Granted Mar 26, 2024·7 cites·24 claims
- 1797US11403071B2Systems and methods for performing instructions to transpose rectangular tilesINTEL CORP·Filed 2020·Granted Aug 2, 2022·7 cites·21 claims
- 1897US10970076B2Systems and methods for performing instructions specifying ternary tile logic operationsINTEL CORP·Filed 2018·Granted Apr 6, 2021·27 cites·22 claims
- 1997US10664287B2Systems and methods for implementing chained tile operationsINTEL CORP·Filed 2018·Granted May 26, 2020·25 cites·22 claims
- 2096US11579883B2Systems and methods for performing horizontal tile operationsINTEL CORP·Filed 2018·Granted Feb 14, 2023·17 cites·20 claims
- 2196US11392500B2No-locality hint vector memory access processors, methods, systems, and instructionsINTEL CORP·Filed 2020·Granted Jul 19, 2022·3 cites·29 claims
- 2296US10922077B2Apparatuses, methods, and systems for stencil configuration and computation instructionsINTEL CORP·Filed 2018·Granted Feb 16, 2021·23 cites·24 claims
- 2396US9600442B2No-locality hint vector memory access processors, methods, systems, and instructionsINTEL CORP·Filed 2014·Granted Mar 21, 2017·24 cites·15 claims
- 2495US10942985B2Apparatuses, methods, and systems for fast fourier transform configuration and computation instructionsINTEL CORP·Filed 2018·Granted Mar 9, 2021·25 cites·24 claims
- 2595US9348601B2Coalescing adjacent gather/scatter operationsINTEL CORP·Filed 2012·Granted May 24, 2016·14 cites·21 claims
- 2694US9323672B2Scatter-gather intelligent memory architecture for unstructured streaming data on multiprocessor systemsINTEL CORP·Filed 2014·Granted Apr 26, 2016·14 cites·19 claims
- 2794US8578097B2Scatter-gather intelligent memory architecture for unstructured streaming data on multiprocessor systemsKIM DAEHYUN·Filed 2011·Granted Nov 5, 2013·23 cites·17 claims
- 2893US12175246B2Systems and methods for performing matrix compress and decompress instructionsINTEL CORP·Filed 2023·Granted Dec 24, 2024·1 cites·18 claims
- 2993US11113053B2Data element comparison processors, methods, systems, and instructionsINTEL CORP·Filed 2019·Granted Sep 7, 2021·8 cites·20 claims
- 3093US10467144B2No-locality hint vector memory access processors, methods, systems, and instructionsINTEL CORP·Filed 2018·Granted Nov 5, 2019·6 cites·33 claims
- 3193US10452555B2No-locality hint vector memory access processors, methods, systems, and instructionsINTEL CORP·Filed 2018·Granted Oct 22, 2019·6 cites·30 claims
- 3293US10296459B1Remote atomic operations in multi-socket systemsINTEL CORP·Filed 2017·Granted May 21, 2019·9 cites·25 claims
- 3393US9575765B2Coalescing adjacent gather/scatter operationsINTEL CORP·Filed 2015·Granted Feb 21, 2017·6 cites·11 claims
- 3493US8447962B2Gathering and scattering multiple data elementsHUGHES CHRISTOPHER J·Filed 2009·Granted May 21, 2013·36 cites·30 claims
- 3593US8074026B2Scatter-gather intelligent memory architecture for unstructured streaming data on multiprocessor systemsKIM DAEHYUN·Filed 2006·Granted Dec 6, 2011·27 cites·10 claims
- 3692US11294671B2Systems and methods for performing duplicate detection instructions on 2D dataINTEL CORP·Filed 2018·Granted Apr 5, 2022·8 cites·25 claims
- 3792US10838734B2Apparatus and method for processing structure of arrays (SoA) and array of structures (AoS) dataINTEL CORP·Filed 2018·Granted Nov 17, 2020·8 cites·24 claims
- 3892US10210091B2No-locality hint vector memory access processors, methods, systems, and instructionsINTEL CORP·Filed 2017·Granted Feb 19, 2019·5 cites·17 claims
- 3992US8688957B2Mechanism for conflict detection using SIMDSMELYANSKIY MIKHAIL·Filed 2010·Granted Apr 1, 2014·25 cites·20 claims
- 4091US12287843B2Systems and methods of instructions to accelerate multiplication of sparse matrices using bitmasks that identify non-zero elementsINTEL CORP·Filed 2023·Granted Apr 29, 2025·1 cites·20 claims
- 4191US11886875B2Systems and methods for performing nibble-sized operations on matrix elementsINTEL CORP·Filed 2018·Granted Jan 30, 2024·7 cites·19 claims
- 4291US8972698B2Vector conflict instructionsHUGHES CHRISTOPHER J·Filed 2010·Granted Mar 3, 2015·18 cites·23 claims
- 4391US8478941B2Gather and scatter operations in multi-level memory hierarchyHUGHES CHRISTOPHER J·Filed 2012·Granted Jul 2, 2013·12 cites·20 claims
- 4490US10452398B2Methods, apparatus, instructions and logic to provide permute controls with leading zero count functionalityINTEL CORP·Filed 2018·Granted Oct 22, 2019·3 cites·18 claims
- 4590US9804850B2Methods, apparatus, instructions and logic to provide permute controls with leading zero count functionalityINTEL CORP·Filed 2016·Granted Oct 31, 2017·4 cites·12 claims
- 4690US9632792B2Coalescing adjacent gather/scatter operationsINTEL CORP·Filed 2015·Granted Apr 25, 2017·4 cites·10 claims
- 4790US9626192B2Coalescing adjacent gather/scatter operationsINTEL CORP·Filed 2015·Granted Apr 18, 2017·4 cites·24 claims
- 4890US8799577B2Gather and scatter operations in multi-level memory hierarchyINTEL CORP·Filed 2013·Granted Aug 5, 2014·10 cites·20 claims
- 4990US7856537B2Hybrid hardware and software implementation of transactional memory accessINTEL CORP·Filed 2004·Granted Dec 21, 2010·43 cites·32 claims
- 5089US10929298B2No-locality hint vector memory access processors, methods, systems, and instructionsINTEL CORP·Filed 2019·Granted Feb 23, 2021·3 cites·27 claims
Showing the top 50 of 247 patent records by PatentIndex Score.
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