Inventor · disambiguated record
Ching-Te Chuang
Also filed as: CHUANG CHING-TE · CHUANG CHING-TE K · CHUANG CHING-TE KENT
67 granted patents·6 pending applications·899 citations·filing 1987–2015
99Inventor score
Top patents by PatentIndex Score
73 records- 0197US7362606B2Asymmetrical memory cells and memories using the cellsIBM·Filed 2006·Granted Apr 22, 2008·54 cites·24 claims
- 0296US7177177B2Back-gate controlled read SRAM cellIBM·Filed 2005·Granted Feb 13, 2007·60 cites·23 claims
- 0395US8837207B1Static memory and memory cell thereofUNIV NAT CHIAO TUNG·Filed 2013·Granted Sep 16, 2014·30 cites·16 claims
- 0493US7642864B2Circuits and design structures for monitoring NBTI (negative bias temperature instability) effect and/or PBTI (positive bias temperature instability) effectIBM·Filed 2008·Granted Jan 5, 2010·35 cites·20 claims
- 0592US7313012B2Back-gate controlled asymmetrical memory cell and memory using the cellIBM·Filed 2006·Granted Dec 25, 2007·23 cites·20 claims
- 0691US8345504B2Data-aware dynamic supply random access memoryFARADAY TECH CORP·Filed 2011·Granted Jan 1, 2013·16 cites·10 claims
- 0791US6441663B1SOI CMOS Schmitt trigger circuits with controllable hysteresisIBM·Filed 2000·Granted Aug 27, 2002·42 cites·20 claims
- 0891US6222394B1SOI CMOS sense amplifier with enhanced matching characteristics and sense point toleranceIBM·Filed 2000·Granted Apr 24, 2001·57 cites·13 claims
- 0990US8320164B2Static random access memory with data controlled power supplyCHUANG CHING-TE·Filed 2011·Granted Nov 27, 2012·21 cites·19 claims
- 1089US7973564B1High load driving deviceUNIV NAT CHIAO TUNG·Filed 2010·Granted Jul 5, 2011·15 cites·9 claims
- 1189US7342287B2Power gating schemes in SOI circuits in hybrid SOI-epitaxial CMOS structuresIBM·Filed 2005·Granted Mar 11, 2008·17 cites·20 claims
- 1289US6448830B1Single-stage tri-state Schmitt triggerIBM·Filed 2001·Granted Sep 10, 2002·35 cites·11 claims
- 1387US8659936B2Low power static random access memoryCHUANG CHING-TE·Filed 2010·Granted Feb 25, 2014·13 cites·4 claims
- 1487US8325512B2SRAM writing system and related apparatusCHUANG CHING-TE·Filed 2011·Granted Dec 4, 2012·15 cites·16 claims
- 1587US7274217B2High performance PFET header in hybrid orientation technology for leakage reduction in digital CMOS VLSI designsIBM·Filed 2005·Granted Sep 25, 2007·15 cites·25 claims
- 1687US6608785B2Method and apparatus to ensure functionality and timing robustness in SOI circuitsIBM·Filed 2002·Granted Aug 19, 2003·44 cites·17 claims
- 1785US7952422B2Methods and apparatus for varying a supply voltage or reference voltage using independent control of diode voltage in asymmetrical double-gate devicesIBM·Filed 2009·Granted May 31, 2011·11 cites·6 claims
- 1883US8693237B2Single-ended SRAM with cross-point data-aware write operationJOU SHYH-JYE·Filed 2012·Granted Apr 8, 2014·14 cites·10 claims
- 1983US7323908B2Cascaded pass-gate test circuit with interposed split-output drive devicesIBM·Filed 2005·Granted Jan 29, 2008·10 cites·15 claims
- 2083US7298176B2Dual-gate dynamic logic circuit with pre-charge keeperIBM·Filed 2005·Granted Nov 20, 2007·12 cites·20 claims
- 2182US7956669B2High-density low-power data retention power gating with double-gate devicesIBM·Filed 2005·Granted Jun 7, 2011·10 cites·16 claims
- 2282US7492628B2Computer-readable medium encoding a memory using a back-gate controlled asymmetrical memory cellIBM·Filed 2007·Granted Feb 17, 2009·10 cites·5 claims
- 2382US7382162B2High-density logic techniques with reduced-stack multi-gate field effect transistorsIBM·Filed 2005·Granted Jun 3, 2008·10 cites·4 claims
- 2480US8169814B2Schmitt trigger-based finFET SRAM cellCHUANG CHING-TE·Filed 2010·Granted May 1, 2012·8 cites·8 claims
- 2580US7336105B2Dual gate transistor keeper dynamic logicIBM·Filed 2005·Granted Feb 26, 2008·9 cites·14 claims
- 2680US6798682B2Reduced integrated circuit chip leakage and method of reducing leakageIBM·Filed 2002·Granted Sep 28, 2004·28 cites·33 claims
- 2778US8804445B2Oscillato based on a 6T SRAM for measuring the bias temperature instabilityCHUANG CHING-TE·Filed 2012·Granted Aug 12, 2014·7 cites·9 claims
- 2878US5017990ARaised base bipolar transistor structure and its method of fabricationIBM·Filed 1989·Granted May 21, 1991·34 cites·19 claims
- 2974US8385149B2Gate oxide breakdown-withstanding power switch structureUNIV NAT CHIAO TUNG·Filed 2011·Granted Feb 26, 2013·5 cites·6 claims
- 3073US8030971B2High-density logic techniques with reduced-stack multi-gate field effect transistorsIBM·Filed 2008·Granted Oct 4, 2011·5 cites·15 claims
- 3172US9412439B1Hybrid TFET-MOSFET circuit designTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Aug 9, 2016·4 cites·20 claims
- 3272US8213257B2Variation-tolerant word-line under-drive scheme for random access memoryCHUANG CHING-TE·Filed 2010·Granted Jul 3, 2012·5 cites·12 claims
- 3372US8139400B2Enhanced static random access memory stability using asymmetric access transistors and design structure for sameBANSAL ADITYA·Filed 2008·Granted Mar 20, 2012·7 cites·15 claims
- 3472US6373281B1Tri-state dynamic body charge modulation for sensing devices in SOI RAM applicationsIBM·Filed 2001·Granted Apr 16, 2002·18 cites·17 claims
- 3571US7903450B2Asymmetrical memory cells and memories using the cellsIBM·Filed 2008·Granted Mar 8, 2011·6 cites·24 claims
- 3671US5003199AEmitter coupled logic circuit having an active pull-down output stageIBM·Filed 1990·Granted Mar 26, 1991·24 cites·6 claims
- 3769US5089724AHigh-speed low-power ECL/NTL circuits with AC-coupled complementary push-pull output stageIBM·Filed 1990·Granted Feb 18, 1992·22 cites·12 claims
- 3867US7417889B2Independent-gate controlled asymmetrical memory cell and memory using the cellIBM·Filed 2006·Granted Aug 26, 2008·5 cites·17 claims
- 3967US6952113B2Method of reducing leakage current in sub one volt SOI circuitsIBM·Filed 2003·Granted Oct 4, 2005·12 cites·19 claims
- 4066US8259510B2Disturb-free static random access memory cellCHUANG CHING-TE·Filed 2010·Granted Sep 4, 2012·4 cites·16 claims
- 4165US8582378B1Threshold voltage measurement deviceCHUANG CHING-TE·Filed 2012·Granted Nov 12, 2013·4 cites·10 claims
- 4265US7742327B2Computer-readable medium encoding a back-gate controlled asymmetrical memory cell and memory using the cellIBM·Filed 2008·Granted Jun 22, 2010·4 cites·13 claims
- 4364US9275726B2Static memory cellFARADAY TECH CORP·Filed 2014·Granted Mar 1, 2016·3 cites·16 claims
- 4463US5075566ABipolar emitter-coupled logic multiplexerIBM·Filed 1990·Granted Dec 24, 1991·17 cites·6 claims
- 4560US8217427B2High density stable static random access memoryCHUANG CHING-TE K·Filed 2007·Granted Jul 10, 2012·5 cites·20 claims
- 4659US6789099B2Sense-amp based adder with source follower evaluation treeIBM·Filed 2002·Granted Sep 7, 2004·6 cites·6 claims
- 4758US8405129B2Structure for high density stable static random access memoryCHUANG CHING-TE K·Filed 2012·Granted Mar 26, 2013·2 cites·20 claims
- 4856US7548822B2Apparatus and method for determining the slew rate of a signal produced by an integrated circuitIBM·Filed 2007·Granted Jun 16, 2009·2 cites·7 claims
- 4955US7085798B2Sense-amp based adder with source follower pass gate evaluation treeIBM·Filed 2002·Granted Aug 1, 2006·4 cites·17 claims
- 5054US7265589B2Independent gate control logic circuitryIBM·Filed 2005·Granted Sep 4, 2007·2 cites·14 claims
Showing the top 50 of 73 patent records by PatentIndex Score.
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