Inventor · disambiguated record
Gerald L. Frenkil
Also filed as: FRENKIL GERALD L
11 granted patents·2 pending applications·383 citations·filing 1990–2013
92Inventor score
Files withSEQUENCE DESIGN INC5VLSI TECHNOLOGY INC3APACHE DESIGN SOLUTIONS INC2FRENKIL GERALD L1SENTE INC1
Top patents by PatentIndex Score
13 records- 0194US5193072AHidden refresh of a dynamic random access memoryVLSI TECHNOLOGY INC·Filed 1990·Granted Mar 9, 1993·147 cites·19 claims
- 0291US7509613B2Design method and architecture for power gate switch placement and interconnection using tapless librariesSEQUENCE DESIGN INC·Filed 2006·Granted Mar 24, 2009·29 cites·3 claims
- 0385US7987441B2Method and architecture for power gate switch placementAPACHE DESIGN SOLUTIONS INC·Filed 2009·Granted Jul 26, 2011·12 cites·28 claims
- 0484US6807660B1Vectorless instantaneous current estimationSEQUENCE DESIGN INC·Filed 2002·Granted Oct 19, 2004·36 cites·11 claims
- 0582US5418407AAsynchronous to synchronous particularly CMOS synchronizersVLSI TECHNOLOGY INC·Filed 1994·Granted May 23, 1995·37 cites·3 claims
- 0680US7774728B2Method that allows flexible evaluation of power-gated circuitsAPACHE DESIGN SOLUTIONS INC·Filed 2005·Granted Aug 10, 2010·11 cites·16 claims
- 0779US7590962B2Design method and architecture for power gate switch placementSEQUENCE DESIGN INC·Filed 2004·Granted Sep 15, 2009·24 cites·34 claims
- 0873US7117457B2Current scheduling system and method for optimizing multi-threshold CMOS designsSEQUENCE DESIGN INC·Filed 2003·Granted Oct 3, 2006·19 cites·54 claims
- 0963US7185300B2Vectorless instantaneous current estimationSEQUENCE DESIGN INC·Filed 2004·Granted Feb 27, 2007·8 cites·29 claims
- 1063US6151568APower estimation software systemSENTE INC·Filed 1997·Granted Nov 21, 2000·52 cites·65 claims
- 1145US5181203ATestable power-on-reset circuitVLSI TECHNOLOGY INC·Filed 1990·Granted Jan 19, 1993·8 cites·13 claims
- 1244US2014107999A1Multi-level abstract power modeling methodSILICON INTEGRATION INITIATIVE INC·Filed 2013·Application pending·0 cites
- 1340US2010063761A1Clock Jitter AnalysisFRENKIL GERALD L·Filed 2008·Application pending·0 cites
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