Inventor · disambiguated record
Bruce Querbach
Also filed as: QUERBACH BRUCE
28 granted patents·6 pending applications·152 citations·filing 2003–2019
95Inventor score
Top patents by PatentIndex Score
34 records- 0195US9818457B1Extended platform with additional memory module slots per CPU socketINTEL CORP·Filed 2016·Granted Nov 14, 2017·12 cites·24 claims
- 0291US9977075B1Integrated circuit reliability assessment apparatus and methodINTEL CORP·Filed 2016·Granted May 22, 2018·10 cites·16 claims
- 0390US10014036B1Low power and area efficient memory receiverINTEL CORP·Filed 2016·Granted Jul 3, 2018·12 cites·19 claims
- 0483US6826100B2Push button mode automatic pattern switching for interconnect built-in self testINTEL CORP·Filed 2003·Granted Nov 30, 2004·31 cites·17 claims
- 0581US7139957B2Automatic self test of an integrated circuit component via AC I/O loopbackINTEL CORP·Filed 2003·Granted Nov 21, 2006·27 cites·40 claims
- 0680US9659626B1Memory refresh operation with page openINTEL CORP·Filed 2015·Granted May 23, 2017·4 cites·7 claims
- 0779US10216657B2Extended platform with additional memory module slots per CPU socket and configured for increased performanceINTEL CORP·Filed 2016·Granted Feb 26, 2019·2 cites·25 claims
- 0879US10163508B2Supporting multiple memory types in a memory slotINTEL CORP·Filed 2016·Granted Dec 25, 2018·5 cites·29 claims
- 0979US9691492B1Determination of demarcation voltage for managing drift in non-volatile memory devicesINTEL CORP·Filed 2016·Granted Jun 27, 2017·5 cites·24 claims
- 1075US9922725B2Integrated circuit defect detection and repairINTEL CORP·Filed 2016·Granted Mar 20, 2018·2 cites·21 claims
- 1172US10198333B2Test, validation, and debug architectureTROBOUGH MARK B·Filed 2010·Granted Feb 5, 2019·6 cites·20 claims
- 1272US8868992B2Robust memory link testing using memory controllerSPRY BRYAN L·Filed 2009·Granted Oct 21, 2014·10 cites·13 claims
- 1371US9548137B2Integrated circuit defect detection and repairINTEL CORP·Filed 2014·Granted Jan 17, 2017·4 cites·25 claims
- 1466US10163502B2Selective performance level modes of operation in a non-volatile memoryINTEL CORP·Filed 2016·Granted Dec 25, 2018·2 cites·22 claims
- 1566US7480360B2Regulating a timing between a strobe signal and a data signalINTEL CORP·Filed 2005·Granted Jan 20, 2009·4 cites·19 claims
- 1661US7501863B2Voltage margining with a low power, high speed, input offset cancelling equalizerINTEL CORP·Filed 2007·Granted Mar 10, 2009·5 cites·4 claims
- 1758US9953694B2Memory controller-controlled refresh abortINTEL CORP·Filed 2016·Granted Apr 24, 2018·1 cites·29 claims
- 1858US7228515B2Methods and apparatuses for validating AC I/O loopback tests using delay modeling in RTL simulationINTEL CORP·Filed 2004·Granted Jun 5, 2007·9 cites·18 claims
- 1957US9564245B2Integrated circuit defect detection and repairINTEL CORP·Filed 2013·Granted Feb 7, 2017·1 cites·22 claims
- 2055US11620358B2Technologies for performing macro operations in memoryINTEL CORP·Filed 2019·Granted Apr 4, 2023·0 cites·17 claims
- 2155US11182158B2Technologies for providing adaptive memory media managementINTEL CORP·Filed 2019·Granted Nov 23, 2021·0 cites·20 claims
- 2255US2019122729A1Selective performance level modes of operation in a non-volatile memoryINTEL CORP·Filed 2018·Application pending·0 cites
- 2351US10878100B2Secure boot processor with embedded NVRAMINTEL CORP·Filed 2018·Granted Dec 29, 2020·0 cites·18 claims
- 2449US11074151B2Processor having embedded non-volatile random access memory to support processor monitoring softwareINTEL CORP·Filed 2018·Granted Jul 27, 2021·0 cites·20 claims
- 2549US10599592B2Extended platform with additional memory module slots per CPU socket and configured for increased performanceINTEL CORP·Filed 2019·Granted Mar 24, 2020·0 cites·18 claims
- 2647US10691466B2Booting a computing system using embedded non-volatile memoryINTEL CORP·Filed 2018·Granted Jun 23, 2020·0 cites·7 claims
- 2746US9824743B2Memory refresh operation with page openINTEL CORP·Filed 2017·Granted Nov 21, 2017·0 cites·21 claims
- 2845US10242717B2Extended platform with additional memory module slots per CPU socketINTEL CORP·Filed 2017·Granted Mar 26, 2019·0 cites·22 claims
- 2944US2019227750A1Technologies for performing tensor operations in memoryINTEL CORP·Filed 2019·Application pending·0 cites
- 3041US2019042351A1Self-healing in a computing system using embedded non-volatile memoryINTEL CORP·Filed 2018·Application pending·0 cites
- 3140US11264094B2Memory cell including multi-level sensingINTEL CORP·Filed 2018·Granted Mar 1, 2022·0 cites·19 claims
- 3234US2016378151A1Rack scale architecture (rsa) and shared memory controller (smc) techniques of fast zeroingINTEL CORP·Filed 2015·Application pending·0 cites
- 3333US2004117708A1Pre-announce signaling for interconnect built-in self testFiled 2003·Application pending·0 cites
- 3431US2017160338A1Integrated circuit reliability assessment apparatus and methodINTEL CORP·Filed 2015·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →