Inventor · disambiguated record
Jeffrey J. Loescher
Also filed as: LOESCHER JEFFREY J · LOESCHER JEFFREY JUDE
7 granted patents·2 citations·filing 2015–2019
73Inventor score
Technology areasG06F
Files withSYNOPSYS INC7
Top patents by PatentIndex Score
7 records- 0168US10817639B1Transparent hierarchical routing in an integrated circuit designSYNOPSYS INC·Filed 2019·Granted Oct 27, 2020·1 cites·19 claims
- 0266US9552450B2Determining a user-specified location in a graphical user interface of an electronic design automation toolSYNOPSYS INC·Filed 2015·Granted Jan 24, 2017·1 cites·18 claims
- 0354US10346575B2Graphical user interface to facilitate routing of a physical connection in a hierarchical integrated circuit designSYNOPSYS INC·Filed 2018·Granted Jul 9, 2019·0 cites·20 claims
- 0449US9898570B2Transparent editing of physical data in hierarchical integrated circuit designSYNOPSYS INC·Filed 2016·Granted Feb 20, 2018·0 cites·15 claims
- 0545US10248751B2Alternative hierarchical views of a circuit designSYNOPSYS INC·Filed 2016·Granted Apr 2, 2019·0 cites·12 claims
- 0639US9697313B2Organization for virtual-flat expansion of physical data in physically-hierarchical IC designsSYNOPSYS INC·Filed 2015·Granted Jul 4, 2017·0 cites·14 claims
- 0737US10318685B2Management of placement constraint regions in an electronic design automation (EDA) systemSYNOPSYS INC·Filed 2015·Granted Jun 11, 2019·0 cites·6 claims
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