Inventor · disambiguated record
Pooja R. Batra
Also filed as: BATRA POOJA R
6 granted patents·29 citations·filing 2013–2015
78Inventor score
Technology areasH10W
Files withIBM6
Top patents by PatentIndex Score
6 records- 0192US9870979B2Double-sided segmented line architecture in 3D integrationIBM·Filed 2015·Granted Jan 16, 2018·10 cites·7 claims
- 0292US9559040B2Double-sided segmented line architecture in 3D integrationIBM·Filed 2013·Granted Jan 31, 2017·14 cites·10 claims
- 0379US9536809B2Combination of TSV and back side wiring in 3D integrationIBM·Filed 2015·Granted Jan 3, 2017·3 cites·3 claims
- 0469US9543229B2Combination of TSV and back side wiring in 3D integrationIBM·Filed 2013·Granted Jan 10, 2017·2 cites·6 claims
- 0554US9245892B2Semiconductor structure having buried conductive elementsIBM·Filed 2014·Granted Jan 26, 2016·0 cites·10 claims
- 0650US9263454B2Semiconductor structure having buried conductive elementsIBM·Filed 2015·Granted Feb 16, 2016·0 cites·10 claims
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