Inventor · disambiguated record
Hiroshi Ikejima
Also filed as: IKEJIMA HIROSHI
24 granted patents·142 citations·filing 2008–2011
95Inventor score
Top patents by PatentIndex Score
24 records- 0196US8618646B2Layered chip package and method of manufacturing sameSASAKI YOSHITAKA·Filed 2010·Granted Dec 31, 2013·32 cites·26 claims
- 0289US7968374B2Layered chip package with wiring on the side surfacesHEADWAY TECHNOLOGIES INC·Filed 2009·Granted Jun 28, 2011·17 cites·18 claims
- 0389US7902677B1Composite layered chip package and method of manufacturing sameHEADWAY TECHNOLOGIES INC·Filed 2009·Granted Mar 8, 2011·17 cites·14 claims
- 0485US8203215B2Layered chip package and method of manufacturing sameSASAKI YOSHITAKA·Filed 2010·Granted Jun 19, 2012·8 cites·24 claims
- 0583US8154116B2Layered chip package with heat sinkSASAKI YOSHITAKA·Filed 2008·Granted Apr 10, 2012·11 cites·18 claims
- 0681US8362602B2Layered chip package and method of manufacturing sameHEADWAY TECHNOLOGIES INC·Filed 2010·Granted Jan 29, 2013·6 cites·22 claims
- 0780US7964976B2Layered chip package and method of manufacturing sameHEADWAY TECHNOLOGIES INC·Filed 2008·Granted Jun 21, 2011·8 cites·3 claims
- 0879US7915083B1Method of manufacturing layered chip packageHEADWAY TECHNOLOGIES INC·Filed 2009·Granted Mar 29, 2011·8 cites·4 claims
- 0978US8203216B2Layered chip package and method of manufacturing sameSASAKI YOSHITAKA·Filed 2010·Granted Jun 19, 2012·5 cites·19 claims
- 1075US8462482B2Ceramic capacitor and method of manufacturing sameSASAKI YOSHITAKA·Filed 2009·Granted Jun 11, 2013·7 cites·14 claims
- 1175US8358015B2Layered chip package and method of manufacturing sameHEADWAY TECHNOLOGIES INC·Filed 2011·Granted Jan 22, 2013·4 cites·8 claims
- 1273US8324741B2Layered chip package with wiring on the side surfacesSASAKI YOSHITAKA·Filed 2011·Granted Dec 4, 2012·3 cites·11 claims
- 1366US8653639B2Layered chip package and method of manufacturing sameSASAKI YOSHITAKA·Filed 2011·Granted Feb 18, 2014·2 cites·11 claims
- 1466US8432662B2Ceramic capacitor and method of manufacturing sameSASAKI YOSHITAKA·Filed 2009·Granted Apr 30, 2013·4 cites·6 claims
- 1566US8421243B2Layered chip package and method of manufacturing sameSASAKI YOSHITAKA·Filed 2010·Granted Apr 16, 2013·2 cites·16 claims
- 1666US8344494B2Layered chip package and method of manufacturing sameHEADWAY TECHNOLOGIES INC·Filed 2011·Granted Jan 1, 2013·2 cites·15 claims
- 1762US8466562B2Layered chip packageSASAKI YOSHITAKA·Filed 2009·Granted Jun 18, 2013·2 cites·5 claims
- 1860US8426979B2Composite layered chip packageSASAKI YOSHITAKA·Filed 2011·Granted Apr 23, 2013·1 cites·8 claims
- 1960US8253257B2Layered chip package and method of manufacturing the sameSASAKI YOSHITAKA·Filed 2011·Granted Aug 28, 2012·1 cites·13 claims
- 2059US8171607B2Method of manufacturing ceramic capacitorSASAKI YOSHITAKA·Filed 2009·Granted May 8, 2012·2 cites·7 claims
- 2147US8513034B2Method of manufacturing layered chip packageSASAKI YOSHITAKA·Filed 2011·Granted Aug 20, 2013·0 cites·10 claims
- 2239US8652877B2Method of manufacturing layered chip packageSASAKI YOSHITAKA·Filed 2010·Granted Feb 18, 2014·0 cites·4 claims
- 2339US8541887B2Layered chip package and method of manufacturing sameSASAKI YOSHITAKA·Filed 2010·Granted Sep 24, 2013·0 cites·22 claims
- 2438US8441112B2Method of manufacturing layered chip packageSASAKI YOSHITAKA·Filed 2010·Granted May 14, 2013·0 cites·24 claims
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