Inventor · disambiguated record
Ya-Hsiang Chen
Also filed as: CHEN YA-HSIANG
4 granted patents·5 pending applications·8 citations·filing 2009–2012
64Inventor score
Top patents by PatentIndex Score
9 records- 0172US8377815B2Manufacturing method of a semiconductor load boardKINSUS INTERCONNECT TECH CORP·Filed 2011·Granted Feb 19, 2013·4 cites·12 claims
- 0266US7871892B2Method for fabricating buried capacitor structureKINSUS INTERCONNECT TECH CORP·Filed 2009·Granted Jan 18, 2011·3 cites·3 claims
- 0360US8312624B1Method for manufacturing a heat dissipation structure of a printed circuit boardCHANG CHIEN-WEI·Filed 2011·Granted Nov 20, 2012·1 cites·4 claims
- 0444US2013219713A1Method of manufacturing a laminate circuit board with a multilayer circuit structureKINSUS INTERCONNECT TECH CORP·Filed 2012·Application pending·0 cites
- 0543US2010309608A1Buried Capacitor StructureCHANG CHIEN-WEI·Filed 2009·Application pending·0 cites
- 0641US8754328B2Laminate circuit board with a multi-layer circuit structureKINSUS INTERCONNECT TECH CORP·Filed 2012·Granted Jun 17, 2014·0 cites·14 claims
- 0737US2013255858A1Method of manufacturing a laminate circuit boardHSU JUN-CHUNG·Filed 2012·Application pending·0 cites
- 0837US2013284500A1Laminate circuit board structureHSU JUN-CHUNG·Filed 2012·Application pending·0 cites
- 0936US2012228011A1Semiconductor Load BoardCHANG CHIEN-WEI·Filed 2011·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →