Inventor · disambiguated record
Jean Augustin Chan Sow Fook Yiptong
Also filed as: YIPTONG JEAN AUGUSTIN C S · YIPTONG JEAN AUGUSTIN CHAN S F · YIPTONG JEAN AUGUSTIN CHAN SOW · YIPTONG JEAN AUGUSTIN CHAN SOW FOOK
21 granted patents·8 pending applications·2,478 citations·filing 2003–2011
98Inventor score
Top patents by PatentIndex Score
29 records- 0199US7435988B2Semiconductor device including a MOSFET having a band-engineered superlattice with a semiconductor cap layer providing a channelMEARS TECHNOLOGIES INC·Filed 2005·Granted Oct 14, 2008·110 cites·37 claims
- 0299US7303948B2Semiconductor device including MOSFET having band-engineered superlatticeMEARS TECHNOLOGIES INC·Filed 2005·Granted Dec 4, 2007·110 cites·11 claims
- 0399US7265002B2Method for making a semiconductor device including a MOSFET having a band-engineered superlattice with a semiconductor cap layer providing a channelRJ MEARS LLC·Filed 2005·Granted Sep 4, 2007·114 cites·39 claims
- 0498US8389974B2Multiple-wavelength opto-electronic device including a superlatticeMEARS ROBERT J·Filed 2011·Granted Mar 5, 2013·109 cites·34 claims
- 0598US7880161B2Multiple-wavelength opto-electronic device including a superlatticeMEARS TECHNOLOGIES INC·Filed 2007·Granted Feb 1, 2011·121 cites·25 claims
- 0698US7863066B2Method for making a multiple-wavelength opto-electronic device including a superlatticeMEARS TECHNOLOGIES INC·Filed 2007·Granted Jan 4, 2011·110 cites·25 claims
- 0798US7718996B2Semiconductor device comprising a lattice matching layerMEARS TECHNOLOGIES INC·Filed 2007·Granted May 18, 2010·110 cites·26 claims
- 0898US7700447B2Method for making a semiconductor device comprising a lattice matching layerMEARS TECHNOLOGIES INC·Filed 2007·Granted Apr 20, 2010·113 cites·28 claims
- 0998US7625767B2Methods of making spintronic devices with constrained spintronic dopantMEARS TECHNOLOGIES INC·Filed 2007·Granted Dec 1, 2009·117 cites·24 claims
- 1098US7517702B2Method for making an electronic device including a poled superlattice having a net electrical dipole momentMEARS TECHNOLOGIES INC·Filed 2006·Granted Apr 14, 2009·130 cites·27 claims
- 1198US7446002B2Method for making a semiconductor device comprising a superlattice dielectric interface layerMEARS TECHNOLOGIES INC·Filed 2005·Granted Nov 4, 2008·120 cites·21 claims
- 1298US7071119B2Method for making a semiconductor device including band-engineered superlattice having 3/1-5/1 germanium layer structureRJ MEARS LLC·Filed 2004·Granted Jul 4, 2006·112 cites·26 claims
- 1398US7034329B2Semiconductor device including band-engineered superlattice having 3/1-5/1 germanium layer structureRJ MEARS LLC·Filed 2004·Granted Apr 25, 2006·114 cites·26 claims
- 1498US6958486B2Semiconductor device including band-engineered superlatticeRJ MEARS LLC·Filed 2003·Granted Oct 25, 2005·114 cites·71 claims
- 1598US6952018B2Semiconductor device including band-engineered superlatticeRJ MEARS LLC·Filed 2003·Granted Oct 4, 2005·112 cites·26 claims
- 1698US6927413B2Semiconductor device including band-engineered superlatticeRJ MEARS LLC·Filed 2003·Granted Aug 9, 2005·113 cites·26 claims
- 1798US6897472B2Semiconductor device including MOSFET having band-engineered superlatticeRJ MEARS LLC·Filed 2003·Granted May 24, 2005·153 cites·71 claims
- 1898US6891188B2Semiconductor device including band-engineered superlatticeRJ MEARS LLC·Filed 2003·Granted May 10, 2005·123 cites·36 claims
- 1998US6830964B1Method for making semiconductor device including band-engineered superlatticeRJ MEARS LLC·Filed 2003·Granted Dec 14, 2004·136 cites·76 claims
- 2097US7033437B2Method for making semiconductor device including band-engineered superlatticeRJ MEARS LLC·Filed 2003·Granted Apr 25, 2006·110 cites·28 claims
- 2197US6833294B1Method for making semiconductor device including band-engineered superlatticeRJ MEARS LLC·Filed 2003·Granted Dec 21, 2004·127 cites·28 claims
- 2250US2007166928A1Method for making an electronic device including a selectively polable superlatticeRJ MEARS LLC·Filed 2006·Application pending·0 cites
- 2350US2007158640A1Electronic device including a poled superlattice having a net electrical dipole momentRJ MEARS LLC·Filed 2006·Application pending·0 cites
- 2450US2007187667A1Electronic device including a selectively polable superlatticeRJ MEARS LLC·Filed 2006·Application pending·0 cites
- 2548US2010270535A1Electronic device including an electrically polled superlattice and related methodsMEARS TECHNOLOGIES INC·Filed 2010·Application pending·0 cites
- 2641US2008012004A1Spintronic devices with constrained spintronic dopantMEARS TECHNOLOGIES INC·Filed 2007·Application pending·0 cites
- 2738US2006011905A1Semiconductor device comprising a superlattice dielectric interface layerRJ MEARS LLC·Filed 2005·Application pending·0 cites
- 2836US2004262594A1Semiconductor structures having improved conductivity effective mass and methods for fabricating sameRJ MEARS LLC·Filed 2003·Application pending·0 cites
- 2936US2004266116A1Methods of fabricating semiconductor structures having improved conductivity effective massRJ MEARS LLC·Filed 2003·Application pending·0 cites
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