Inventor · disambiguated record
Vasudev Bibikar
Also filed as: BIBIKAR VASUDEV · BIBIKAR VASUDEV J
16 granted patents·5 pending applications·122 citations·filing 1996–2023
92Inventor score
Top patents by PatentIndex Score
21 records- 0192US8555082B1Securing external memory dataBIBIKAR VASUDEV J·Filed 2010·Granted Oct 8, 2013·32 cites·17 claims
- 0281US9235712B1Securing external memory dataMARVELL INT LTD·Filed 2013·Granted Jan 12, 2016·5 cites·20 claims
- 0379US7302600B2Power supply detection method, apparatus, and systemMARVELL INT LTD·Filed 2004·Granted Nov 27, 2007·26 cites·25 claims
- 0476US10996283B2Apparatus and method to debug a voltage regulatorINTEL CORP·Filed 2017·Granted May 4, 2021·1 cites·23 claims
- 0576US7770044B2Method and apparatus for waking up a circuitMARVELL INT LTD·Filed 2007·Granted Aug 3, 2010·7 cites·25 claims
- 0675US9620088B2Technologies for low-power standby display refreshINTEL CORP·Filed 2015·Granted Apr 11, 2017·3 cites·23 claims
- 0775US7603575B2Frequency-dependent voltage control in digital logicWOODBRIDGE NANCY G·Filed 2005·Granted Oct 13, 2009·9 cites·12 claims
- 0871US7334158B2Power fault handling method, apparatus, and systemINTEL CORP·Filed 2004·Granted Feb 19, 2008·15 cites·11 claims
- 0965US11686780B2Apparatus and method to debug a voltage regulatorINTEL CORP·Filed 2021·Granted Jun 27, 2023·0 cites·19 claims
- 1058US9784791B2Apparatus and method to debug a voltage regulatorINTEL CORP·Filed 2014·Granted Oct 10, 2017·1 cites·19 claims
- 1157US2022206549A1System, Apparatus And Method For Dynamic Power State Scaling Of A Voltage Regulator For A ProcessorINTEL CORP·Filed 2022·Application pending·0 cites
- 1253US11314299B2System, apparatus and method for dynamic power state scaling of a voltage regulator for a processorINTEL CORP·Filed 2020·Granted Apr 26, 2022·0 cites·17 claims
- 1346US2024329711A1Apparatus and method for workload, power, and performance-aware dynamic core frequency ramp rateINTEL CORP·Filed 2023·Application pending·0 cites
- 1445US9471132B2Techniques for putting platform subsystems into a lower power state in parallelINTEL CORP·Filed 2013·Granted Oct 18, 2016·0 cites·17 claims
- 1541US10754413B2Mechanism to enter or exit retention level voltage while a system-on-a-chip is in low power modeINTEL CORP·Filed 2017·Granted Aug 25, 2020·0 cites·25 claims
- 1641US10060966B2Method and apparatus for enhancing guardbands using “in-situ” silicon measurementsINTEL CORP·Filed 2015·Granted Aug 28, 2018·0 cites·20 claims
- 1741US6192449B1Apparatus and method for optimizing performance of a cache memory in a data processing systemMOTOROLA INC·Filed 1996·Granted Feb 20, 2001·13 cites·14 claims
- 1839US2016091957A1Power management for memory accesses in a system-on-chipPARTIWALA SUKETU R·Filed 2014·Application pending·0 cites
- 1939US2023104685A1Power management circuitryINTEL CORP·Filed 2020·Application pending·0 cites
- 2039US2006200684A1Power mode change voltage control in computerized systemBIBIKAR VASUDEV·Filed 2005·Application pending·0 cites
- 2137US5765190ACache memory in a data processing systemMOTOROLA INC·Filed 1996·Granted Jun 9, 1998·10 cites·20 claims
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