Inventor · disambiguated record
Mitra Purandare
Also filed as: PURANDARE MITRA · PURANDARE MITRA S
11 granted patents·1 pending application·16 citations·filing 2005–2020
83Inventor score
Top patents by PatentIndex Score
12 records- 0184US9436582B1Calculating an immediate parent assertion statement for program verificationIBM·Filed 2015·Granted Sep 6, 2016·5 cites·20 claims
- 0277US11150926B2Native code generation for cloud servicesIBM·Filed 2019·Granted Oct 19, 2021·3 cites·18 claims
- 0376US10169495B2Method for verifying hardware/software co-designsIBM·Filed 2018·Granted Jan 1, 2019·2 cites·18 claims
- 0473US8688608B2Verifying correctness of regular expression transformations that use a post-processorATASU KUBILAY·Filed 2011·Granted Apr 1, 2014·4 cites·17 claims
- 0570US11907828B2Deep neural network on field-programmable gate arrayIBM·Filed 2019·Granted Feb 20, 2024·2 cites·20 claims
- 0656US11515005B2Interactive-aware clustering of stable statesIBM·Filed 2019·Granted Nov 29, 2022·0 cites·20 claims
- 0752US11521705B2Random sequence generation for gene simulationsIBM·Filed 2018·Granted Dec 6, 2022·0 cites·18 claims
- 0847US9996637B2Method for verifying hardware/software co-designsIBM·Filed 2015·Granted Jun 12, 2018·0 cites·18 claims
- 0945US11177042B2Genetic disease modelingIBM·Filed 2017·Granted Nov 16, 2021·0 cites·20 claims
- 1044US11630696B2Messaging for a hardware acceleration systemIBM·Filed 2020·Granted Apr 18, 2023·0 cites·19 claims
- 1142US10970449B2Learning framework for software-hardware model generation and verificationIBM·Filed 2017·Granted Apr 6, 2021·0 cites·18 claims
- 1238US2006247909A1System and method for emulating a logic circuit design using programmable logic devicesDESAI MADHAV P·Filed 2005·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →