Inventor · disambiguated record
Chee-Wei Kung
Also filed as: KUNG CHEE-WEI
2 granted patents·13 citations·filing 2012–2012
56Inventor score
Technology areasH03K
Files withEASIC CORP2
Top patents by PatentIndex Score
2 records- 0181US9024657B2Architectural floorplan for a structured ASIC manufactured on a 28 NM CMOS process lithographic node or smallerEASIC CORP·Filed 2012·Granted May 5, 2015·9 cites·18 claims
- 0273US8957398B2Via-configurable high-performance logic block involving transistor chainsEASIC CORP·Filed 2012·Granted Feb 17, 2015·4 cites·14 claims
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →