Inventor · disambiguated record
Marvin Denman
Also filed as: DENMAN JR MARVIN A · DENMAN MARVIN · DENMAN MARVIN A
25 granted patents·1 pending application·668 citations·filing 1988–2018
96Inventor score
Top patents by PatentIndex Score
26 records- 0186US5530825AData processor with branch target address cache and method of operationMOTOROLA INC·Filed 1994·Granted Jun 25, 1996·122 cites·4 claims
- 0280US4893267AMethod and apparatus for a data processor to support multi-mode, multi-precision integer arithmeticMOTOROLA INC·Filed 1988·Granted Jan 9, 1990·66 cites·3 claims
- 0379US6157998AMethod for performing branch prediction and resolution of two or more branch instructions within two or more branch prediction buffersMOTOROLA INC·Filed 1998·Granted Dec 5, 2000·83 cites·7 claims
- 0474US5805877AData processor with branch target address cache and method of operationMOTOROLA INC·Filed 1996·Granted Sep 8, 1998·69 cites·14 claims
- 0574US5664215AData processor with an execution unit for performing load instructions and method of operationMOTOROLA INC·Filed 1996·Granted Sep 2, 1997·87 cites·20 claims
- 0671US9836304B2Cumulative confidence fetch throttlingDENMAN MARVIN·Filed 2010·Granted Dec 5, 2017·5 cites·17 claims
- 0771US6477640B1Apparatus and method for predicting multiple branches and performing out-of-order branch resolutionMOTOROLA INC·Filed 2000·Granted Nov 5, 2002·15 cites·8 claims
- 0869US8694759B2Generating predicted branch target address from two entries storing portions of target address based on static/dynamic indicator of branch instruction typeDUNDAS JAMES D·Filed 2010·Granted Apr 8, 2014·3 cites·27 claims
- 0968US9626320B2Technique for scaling the bandwidth of a processing element to match the bandwidth of an interconnectNVIDIA CORP·Filed 2013·Granted Apr 18, 2017·2 cites·22 claims
- 1067US5761723AData processor with branch prediction and method of operationMOTOROLA INC·Filed 1996·Granted Jun 2, 1998·60 cites·14 claims
- 1166US4893268ACircuit and method for accumulating partial products of a single, double or mixed precision multiplicationMOTOROLA INC·Filed 1988·Granted Jan 9, 1990·39 cites·7 claims
- 1263US4903264AMethod and apparatus for handling out of order exceptions in a pipelined data unitMOTOROLA INC·Filed 1988·Granted Feb 20, 1990·35 cites·13 claims
- 1355US10333565B2Safe communication mode for a high speed linkNVIDIA CORP·Filed 2018·Granted Jun 25, 2019·0 cites·20 claims
- 1454US5619408AMethod and system for recoding noneffective instructions within a data processing systemIBM·Filed 1995·Granted Apr 8, 1997·24 cites·11 claims
- 1551US9360906B2Power management for multiple compute unitsADVANCED MICRO DEVICES INC·Filed 2013·Granted Jun 7, 2016·0 cites·20 claims
- 1651US5493669AData processor for simultaneously searching two fields of the rename buffer having first and second most recently allogated bitsMOTOROLA INC·Filed 1993·Granted Feb 20, 1996·24 cites·2 claims
- 1750US10003362B2Safe communication mode for a high speed linkNVIDIA CORP·Filed 2015·Granted Jun 19, 2018·0 cites·19 claims
- 1850US9720768B2System and method for early packet header verificationNVIDIA CORP·Filed 2015·Granted Aug 1, 2017·0 cites·17 claims
- 1948US10200154B2System and method for early packet header verificationNVIDIA CORP·Filed 2017·Granted Feb 5, 2019·0 cites·20 claims
- 2046US9996490B2Technique for scaling the bandwidth of a processing element to match the bandwidth of an interconnectNVIDIA CORP·Filed 2013·Granted Jun 12, 2018·0 cites·22 claims
- 2146US9954984B2System and method for enabling replay using a packetized link protocolNVIDIA CORP·Filed 2015·Granted Apr 24, 2018·0 cites·20 claims
- 2244US5524224ASystem for speculatively executing instructions wherein mispredicted instruction is executed prior to completion of branch processingIBM·Filed 1995·Granted Jun 4, 1996·19 cites·12 claims
- 2344US2014201542A1Adaptive performance optimization of system-on-chip componentsADVANCED MICRO DEVICES INC·Filed 2013·Application pending·0 cites
- 2441US8671269B2Branch predictor accuracy by forwarding table updates to pending branch predictionsDUNDAS JAMES DAVID·Filed 2010·Granted Mar 11, 2014·0 cites·21 claims
- 2536US5717587AMethod and system for recording noneffective instructions within a data processing systemIBM·Filed 1996·Granted Feb 10, 1998·7 cites·11 claims
- 2635US5613081AMethod of operating a data processor with rapid address comparison for data forwardingMOTOROLA INC·Filed 1995·Granted Mar 18, 1997·8 cites·15 claims
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