Inventor · disambiguated record
Stephanie A. Bojarski
Also filed as: BOJARSKI STEPHANIE · BOJARSKI STEPHANIE A
20 granted patents·6 pending applications·42 citations·filing 2015–2025
92Inventor score
Files withINTEL CORP26
Top patents by PatentIndex Score
26 records- 0196US11437283B2Backside contacts for semiconductor devicesINTEL CORP·Filed 2019·Granted Sep 6, 2022·12 cites·25 claims
- 0294US11011693B2Integrated quantum circuit assemblies for cooling apparatusINTEL CORP·Filed 2019·Granted May 18, 2021·11 cites·20 claims
- 0389US12080605B2Backside contacts for semiconductor devicesINTEL CORP·Filed 2022·Granted Sep 3, 2024·1 cites·24 claims
- 0489US11922274B1Quantum dot devices with side and center screening gatesINTEL CORP·Filed 2021·Granted Mar 5, 2024·2 cites·20 claims
- 0583US11257738B2Vertically stacked transistor devices with isolation wall structures containing an electrical conductorINTEL CORP·Filed 2017·Granted Feb 22, 2022·3 cites·25 claims
- 0682US11621354B2Integrated circuit structures having partitioned source or drain contact structuresINTEL CORP·Filed 2018·Granted Apr 4, 2023·2 cites·25 claims
- 0782US11348916B2Leave-behind protective layer having secondary purposeINTEL CORP·Filed 2018·Granted May 31, 2022·3 cites·13 claims
- 0882US11329162B2Integrated circuit structures having differentiated neighboring partitioned source or drain contact structuresINTEL CORP·Filed 2018·Granted May 10, 2022·3 cites·25 claims
- 0981US11569231B2Non-planar transistors with channel regions having varying widthsINTEL CORP·Filed 2019·Granted Jan 31, 2023·3 cites·21 claims
- 1079US12230717B2Integrated circuit structures having partitioned source or drain contact structuresINTEL CORP·Filed 2023·Granted Feb 18, 2025·0 cites·21 claims
- 1177US2024371700A1Backside contacts for semiconductor devicesINTEL CORP·Filed 2024·Application pending·0 cites
- 1272US11699637B2Vertically stacked transistor devices with isolation wall structures containing an electrical conductorINTEL CORP·Filed 2021·Granted Jul 11, 2023·0 cites·25 claims
- 1372US11699747B2Quantum dot devices with multiple layers of gate metalINTEL CORP·Filed 2019·Granted Jul 11, 2023·1 cites·19 claims
- 1471US2025159927A1Integrated circuit structures having partitioned source or drain contact structuresINTEL CORP·Filed 2025·Application pending·0 cites
- 1569US2023307298A1Aligned pitch-quartered patterning for lithography edge placement error advanced rectificationINTEL CORP·Filed 2023·Application pending·0 cites
- 1668US10546772B2Self-aligned via below subtractively patterned interconnectINTEL CORP·Filed 2016·Granted Jan 28, 2020·1 cites·20 claims
- 1766US11996408B2Leave-behind protective layer having secondary purposeINTEL CORP·Filed 2022·Granted May 28, 2024·0 cites·18 claims
- 1859US12230687B2Lateral gate material arrangements for quantum dot devicesINTEL CORP·Filed 2020·Granted Feb 18, 2025·0 cites·21 claims
- 1959US2025351743A1Technologies for scalable spin qubit arraysINTEL CORP·Filed 2025·Application pending·0 cites
- 2052US11658212B2Quantum dot devices with conductive linersINTEL CORP·Filed 2019·Granted May 23, 2023·0 cites·23 claims
- 2150US11682701B2Quantum dot devicesINTEL CORP·Filed 2019·Granted Jun 20, 2023·0 cites·22 claims
- 2249US2019013246A1Aligned pitch-quartered patterning for lithography edge placement error advanced rectificationINTEL CORP·Filed 2016·Application pending·0 cites
- 2348US11616060B2Techniques for forming gate structures for transistors arranged in a stacked configuration on a single fin structureINTEL CORP·Filed 2018·Granted Mar 28, 2023·0 cites·20 claims
- 2447US11424160B2Self-aligned local interconnectsINTEL CORP·Filed 2019·Granted Aug 23, 2022·0 cites·25 claims
- 2545US11152254B2Pitch quartered three-dimensional air gapsINTEL CORP·Filed 2016·Granted Oct 19, 2021·0 cites·9 claims
- 2635US2018323078A1Pitch division using directed self-assemblyINTEL CORP·Filed 2015·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →