P

Inventor

MORETON HENRY P

US60 patents
⚠️ This page may combine multiple inventors who share the name “MORETON HENRY P”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

NVIDIA CORP

27 patents
US7620793B1Nov 17, 2009

Mapping memory partitions to virtual memory pages

NVIDIA CORP93 citations98
US6870540B1Mar 22, 2005

System, method and computer program product for a programmable pixel processing model with instruction set

NVIDIA CORP77 citations98
US6724394B1Apr 20, 2004

Programmable pixel shading architecture

NVIDIA CORP139 citations98
US6906716B2Jun 14, 2005

Integrated tessellator in a graphics processing unit

NVIDIA CORP69 citations97
US6731298B1May 4, 2004

System, method and article of manufacture for z-texture mapping

NVIDIA CORP85 citations97
US7233335B2Jun 19, 2007

System and method for reserving and managing memory spaces in a memory resource

NVIDIA CORP57 citations96
US6900810B1May 31, 2005

User programmable geometry engine

NVIDIA CORP78 citations96
US6828980B1Dec 7, 2004

System, method and computer program product for z-texture mapping

NVIDIA CORP56 citations96
US6600488B1Jul 29, 2003

Tessellation system, method and computer program product with interior and surrounding meshes

NVIDIA CORP44 citations96
US6597356B1Jul 22, 2003

Integrated tessellator in a graphics processing unit

NVIDIA CORP46 citations95
US6940515B1Sep 6, 2005

User programmable primitive engine

NVIDIA CORP52 citations94
US7420557B1Sep 2, 2008

Vertex processing when w=0

NVIDIA CORP21 citations93
US7154507B1Dec 26, 2006

System, method and computer program product for texture shading

NVIDIA CORP29 citations93
US7142206B1Nov 28, 2006

Shared N-patch edges

NVIDIA CORP16 citations93
US6738062B1May 18, 2004

Displaced subdivision surface representation

NVIDIA CORP45 citations93
US7171051B1Jan 30, 2007

Method and apparatus for performing fixed blocksize compression for texture mapping

NVIDIA CORP34 citations92
US6504537B1Jan 7, 2003

System, method and article of manufacture for fractional tessellation during graphics processing

NVIDIA CORP16 citations92
US7324105B1Jan 29, 2008

Neighbor and edge indexing

NVIDIA CORP24 citations91
US6788312B1Sep 7, 2004

Method for improving quality in graphics pipelines through a frame's top and bottom field processing with conditional thresholding and weighting techniques

NVIDIA CORP34 citations91
US6950107B1Sep 27, 2005

System and method for reserving and managing memory spaces in a memory resource

NVIDIA CORP20 citations90
US7739556B1Jun 15, 2010

Hardware override of application programming interface programmed state

NVIDIA CORP18 citations89
US7250946B1Jul 31, 2007

Shared N-patch edges

NVIDIA CORP10 citations84
US7151543B1Dec 19, 2006

Vertex processor with multiple interfaces

NVIDIA CORP12 citations84
US7466322B1Dec 16, 2008

Clipping graphics primitives to the w=0 plane

NVIDIA CORP12 citations83
US6624811B1Sep 23, 2003

System, method and article of manufacture for decomposing surfaces using guard curves and reversed stitching

NVIDIA CORP15 citations83
US7755636B1Jul 13, 2010

System, method and article of manufacture for a programmable processing model with instruction set

NVIDIA CORP5 citations74
US7209140B1Apr 24, 2007

System, method and article of manufacture for a programmable vertex processing model with instruction set

NVIDIA CORP7 citations74

MIPS TECH INC

7 patents

SILICON GRAPHICS INC

6 patents

MORETON HENRY P

2 patents

MICROSOFT CORP

2 patents

NICKOLLS JOHN R

1 patent

VAN HOOK TIMOTHY J

1 patent

ALLEN ROGER L

1 patent

SILICON GRPAHICS INC

1 patent

DULUK JR JEROME F

1 patent

MONTRYM JOHN S

1 patent

Showing the top 50 of 60 patents by PatentIndex Score.