Inventor · disambiguated record
Michael C. Shebanow
Also filed as: SHEBANOW MICHAEL · SHEBANOW MICHAEL C
49 granted patents·4 pending applications·1,922 citations·filing 1984–2021
99Inventor score
Files withFUJITSU LTD9HAL COMPUTER SYSTEMS INC9NVIDIA CORP8SHEBANOW MICHAEL C7ADVANCED MICRO DEVICES INC3
Top patents by PatentIndex Score
53 records- 0198US7627723B1Atomic memory operators in a parallel processorNVIDIA CORP·Filed 2006·Granted Dec 1, 2009·167 cites·20 claims
- 0297US4667326AMethod and apparatus for error detection and correction in systems comprising floppy and/or hard disk drivesADVANCED MICRO DEVICES INC·Filed 1984·Granted May 19, 1987·156 cites·14 claims
- 0395US8704836B1Distributing primitives to multiple rasterizersRHOADES JOHNNY S·Filed 2009·Granted Apr 22, 2014·55 cites·21 claims
- 0494US11615256B1Hybrid accumulation method in multiply-accumulate for machine learningFAR ALI TASDIGHI·Filed 2021·Granted Mar 28, 2023·4 cites·4 claims
- 0593US8035648B1Runahead execution for graphics processing unitsNVIDIA CORP·Filed 2007·Granted Oct 11, 2011·37 cites·20 claims
- 0691US5649136AProcessor structure and method for maintaining and restoring precise state at any instruction boundaryHAL COMPUTER SYSTEMS INC·Filed 1995·Granted Jul 15, 1997·120 cites·18 claims
- 0790US10365930B2Instructions for managing a parallel cache hierarchyNVIDIA CORP·Filed 2017·Granted Jul 30, 2019·5 cites·14 claims
- 0890US8860742B2Coverage cachingSHEBANOW MICHAEL C·Filed 2012·Granted Oct 14, 2014·14 cites·20 claims
- 0990US8700877B2Address mapping for a parallel thread processorSHEBANOW MICHAEL C·Filed 2010·Granted Apr 15, 2014·16 cites·20 claims
- 1090US5644742AProcessor structure and method for a time-out checkpointHAL COMPUTER SYSTEMS INC·Filed 1995·Granted Jul 1, 1997·103 cites·16 claims
- 1190US5367494ARandomly accessible memory having time overlapping memory accessesMOTOROLA INC·Filed 1993·Granted Nov 22, 1994·84 cites·11 claims
- 1288US8817031B2Distributed stream output in a parallel processing unitHAKURA ZIYAD S·Filed 2010·Granted Aug 26, 2014·11 cites·20 claims
- 1388US8599202B1Computing tessellation coordinates using dedicated hardwareLEGAKIS JUSTIN S·Filed 2008·Granted Dec 3, 2013·17 cites·21 claims
- 1488US5355457AData processor for performing simultaneous instruction retirement and backtrackingMOTOROLA INC·Filed 1991·Granted Oct 11, 1994·134 cites·9 claims
- 1587US6519730B1Computer and error recovery method for the sameFUJITSU LTD·Filed 2000·Granted Feb 11, 2003·51 cites·14 claims
- 1687US5751985AProcessor structure and method for tracking instruction status to maintain precise stateHAL COMPUTER SYSTEMS INC·Filed 1995·Granted May 12, 1998·84 cites·36 claims
- 1787US4667286AMethod and apparatus for transferring data between a disk and a central processing unitADVANCED MICRO DEVICES INC·Filed 1984·Granted May 19, 1987·86 cites·12 claims
- 1886US8127181B1Hardware warning protocol for processing unitsSHEBANOW MICHAEL C·Filed 2007·Granted Feb 28, 2012·17 cites·20 claims
- 1985US8223158B1Method and system for connecting multiple shadersLINDHOLM JOHN ERIK·Filed 2006·Granted Jul 17, 2012·13 cites·33 claims
- 2085US4618898AMethod and apparatus for reading a diskADVANCED MICRO DEVICES INC·Filed 1984·Granted Oct 21, 1986·29 cites·10 claims
- 2184US9223578B2Coalescing memory barrier operations across multiple parallel threadsNICKOLLS JOHN R·Filed 2010·Granted Dec 29, 2015·8 cites·21 claims
- 2284US8947444B1Distributed vertex attribute fetchHAKURA ZIYAD S·Filed 2008·Granted Feb 3, 2015·13 cites·24 claims
- 2384US5659721AProcessor structure and method for checkpointing instructions to maintain precise stateHAL COMPUTER SYSTEMS INC·Filed 1995·Granted Aug 19, 1997·68 cites·50 claims
- 2482US5673408AProcessor structure and method for renamable trap-stackHAL COMPUTER SYSTEMS INC·Filed 1995·Granted Sep 30, 1997·72 cites·18 claims
- 2581US9536341B1Distributing primitives to multiple rasterizersRHOADES JOHNNY S·Filed 2009·Granted Jan 3, 2017·12 cites·21 claims
- 2681US5651124AProcessor structure and method for aggressively scheduling long latency instructions including load/store instructions while maintaining precise stateHAL COMPUTER SYSTEMS INC·Filed 1995·Granted Jul 22, 1997·65 cites·24 claims
- 2779US8522000B2Trap handler architecture for a parallel processing unitSHEBANOW MICHAEL C·Filed 2009·Granted Aug 27, 2013·11 cites·20 claims
- 2878US7512773B1Context switching using halt sequencing protocolNVIDIA CORP·Filed 2005·Granted Mar 31, 2009·10 cites·12 claims
- 2977US5673426AProcessor structure and method for tracking floating-point exceptionsHAL COMPUTER SYSTEMS INC·Filed 1995·Granted Sep 30, 1997·49 cites·8 claims
- 3076US7916146B1Halt context switching method and systemNVIDIA CORP·Filed 2005·Granted Mar 29, 2011·8 cites·12 claims
- 3175US8533435B2Reordering operands assigned to each one of read request ports concurrently accessing multibank register file to avoid bank conflictQIU XIAOGANG·Filed 2010·Granted Sep 10, 2013·4 cites·19 claims
- 3275US5966530AStructure and method for instruction boundary machine state restorationFUJITSU LTD·Filed 1997·Granted Oct 12, 1999·43 cites·10 claims
- 3375US5675759AMethod and apparatus for register management using issue sequence prior physical register and register association validity informationFiled 1995·Granted Oct 7, 1997·79 cites·11 claims
- 3473US9483264B2Trace-based instruction execution processingSAMSUNG ELECTRONICS CO LTD·Filed 2014·Granted Nov 1, 2016·3 cites·24 claims
- 3570US5896528ASuperscalar processor with multiple register windows and speculative return address generationFUJITSU LTD·Filed 1995·Granted Apr 20, 1999·60 cites·3 claims
- 3670US5655115AProcessor structure and method for watchpoint of plural simultaneous unresolved branch evaluationHAL COMPUTER SYSTEMS INC·Filed 1995·Granted Aug 5, 1997·37 cites·73 claims
- 3764US9639479B2Instructions for managing a parallel cache hierarchyNICKOLLS JOHN R·Filed 2010·Granted May 2, 2017·1 cites·20 claims
- 3863US8458440B2Deferred complete virtual address computation for local memory space requestsSHEBANOW MICHAEL C·Filed 2010·Granted Jun 4, 2013·1 cites·18 claims
- 3962US9760968B2Reduction of graphical processing through coverage testingSAMSUNG ELECTRONICS CO LTD·Filed 2014·Granted Sep 12, 2017·1 cites·26 claims
- 4062US8019978B1Unit status reporting protocolNVIDIA CORP·Filed 2007·Granted Sep 13, 2011·2 cites·20 claims
- 4161US5740414AMethod and apparatus for coordinating the use of physical registers in a microprocessorHAL COMPUTER SYSTEMS INC·Filed 1995·Granted Apr 14, 1998·42 cites·8 claims
- 4259US5838940AMethod and apparatus for rotating active instructions in a parallel data processorFUJITSU LTD·Filed 1997·Granted Nov 17, 1998·38 cites·6 claims
- 4356US5745726AMethod and apparatus for selecting the oldest queued instructions without data dependenciesFUJITSU LTD·Filed 1995·Granted Apr 28, 1998·34 cites·5 claims
- 4453US9922457B2Computing tessellation coordinates using dedicated hardwareNVIDIA CORP·Filed 2013·Granted Mar 20, 2018·0 cites·17 claims
- 4552US7293162B2Split data-flow scheduling mechanismFUJITSU LTD·Filed 2002·Granted Nov 6, 2007·2 cites·38 claims
- 4652US5784586AAddressing method for executing load instructions out of order with respect to store instructionsFUJITSU LTD·Filed 1995·Granted Jul 21, 1998·28 cites·5 claims
- 4750US9830161B2Tree-based thread managementNVIDIA CORP·Filed 2014·Granted Nov 28, 2017·0 cites·20 claims
- 4847US2010095117A1Secure and positive authentication across a networkSHEBANOW MICHAEL C·Filed 2008·Application pending·0 cites
- 4946US5708788AMethod for adjusting fetch program counter in response to the number of instructions fetched and issuedFUJITSU LTD·Filed 1995·Granted Jan 13, 1998·20 cites·9 claims
- 5046US2015187043A1Virtualizing storage structures with unified heap architectureSAMSUNG ELECTRONICS CO LTD·Filed 2013·Application pending·0 cites
Showing the top 50 of 53 patent records by PatentIndex Score.
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