Inventor

SWOBODA GARY L

US226 patents

⚠️ This page may combine multiple inventors who share the name “SWOBODA GARY L”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SWOBODA GARY L

TEXAS INSTRUMENTS INC

Collecting and exporting on-chip data processor trace and timing information with differing collection and export formats

Obtaining and exporting on-chip data processor trace and timing information

Programmable ring oscillator

Processor condition sensing circuits, systems and methods

Processor condition sensing circuits, systems and methods

Method for debugging an integrated circuit using extended operating modes

Emulation devices, systems and methods utilizing state machines

Using selective omission to compress on-chip data processor trace and timing information for export

Dynamically configurable debug port for concurrent support of debug functions from multiple data processing cores

Integrated circuit with emulation register in JTAG JAP

Emulation suspend mode with instruction jamming

Emulation suspend mode with differing response to differing classes of interrupts

Method for testing an integrated circuit with user definable trace function

Correlating on-chip data processor trace information for export

Exporting on-chip data processor trace information with variable proportions of control and data

Using sign extension to compress on-chip data processor trace and timing information for export

Synchronizing on-chip data processor trace and timing information for export

Scan interface with TDM feature for permitting signal overlay

Debug bi-phase export and data recovery

Debug trigger builder

Emulation suspension mode with stop mode extension

Emulation suspension mode handling multiple stops and starts

Processor condition sensing circuits, systems and methods

IC with selectively applied functional and test clocks

Emulation devices, systems and methods utilizing state machines

Data processing devices, systems and methods with mode driven stops

Emulation devices, systems and methods with distributed control of clock domains

Emulation devices, systems, and methods

Apparatus for cleanly switching between various clock sources in a data processing system

Emulation devices, systems and methods with distributed control of test interfaces in clock domains

Electronic systems testing employing embedded serial scan generator

Electronic systems and emulation and testing devices, cables, systems and methods

Pipelined data processing including instruction trace

Counter/gating producing technology specific function outputs from TCK and TMS(C)

Powering up adapter and scan test logic TAP controllers

Zero-bit scans defining command window and control level

Receiving control, data, and control segments of communication scan packets

Debug and test system with format select register circuitry

Emulation system with peripherals recording emulation frame when stop generated

Trace receiver data compression

Program counter trace stack, access port, and serial scan path

Pipeline flattener for simplifying event detection during data processor debug operations

Software emulation monitor employed with hardware suspend mode

Apparatus and method for processor power measurement in a digital signal processor using trace data and simulation techniques

Clock modes for a debug port with on the fly clock switching

Remotely controllable phase locked loop clock circuit

Integrated circuit design system with shared hardware accelerator and processes of designing integrated circuits

Synchronizing on-chip data processor trace and timing information for export

Apparatus and method for trace stream identification of a processor reset

SWOBODA GARY L

JTAG debug test system adapter with three sets of leads