Inventor · disambiguated record
Paul F. Policke
Also filed as: POLICKE PAUL F · Policke Paul
5 granted patents·2 pending applications·23 citations·filing 2010–2024
75Inventor score
Top patents by PatentIndex Score
7 records- 0187US8522097B2Logic built-in self-test programmable pattern bit maskKIM HONG S·Filed 2010·Granted Aug 27, 2013·11 cites·29 claims
- 0285US9740234B1On-chip clock controllerQUALCOMM INC·Filed 2016·Granted Aug 22, 2017·7 cites·27 claims
- 0371US2025027993A1Integrated circuit including constant-0 flip flops reconfigured to provide observable and controllable test pointsQUALCOMM INC·Filed 2024·Application pending·0 cites
- 0468US12130330B2Integrated circuit including constant-0 flip flops reconfigured to provide observable and controllable test pointsQUALCOMM INC·Filed 2023·Granted Oct 29, 2024·0 cites·9 claims
- 0565US8627159B2Feedback scan isolation and scan bypass architecturePOLICKE PAUL F·Filed 2010·Granted Jan 7, 2014·4 cites·25 claims
- 0658US8527825B2Debugger based memory dump using built in self testKIM HONG S·Filed 2010·Granted Sep 3, 2013·1 cites·18 claims
- 0746US2024111934A1Design for testability for fault detection in clock gate control circuitsQUALCOMM INC·Filed 2023·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →