Inventor · disambiguated record
Gene Leung
Also filed as: LEUNG GENE
10 granted patents·1 pending application·68 citations·filing 2005–2019
85Inventor score
Top patents by PatentIndex Score
11 records- 0197US9978118B1No miss cache structure for real-time image transformations with data compressionMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2017·Granted May 22, 2018·55 cites·24 claims
- 0284US10672368B2No miss cache structure for real-time image transformations with multiple LSR processing enginesMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2019·Granted Jun 2, 2020·3 cites·19 claims
- 0383US10242654B2No miss cache structure for real-time image transformationsMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2017·Granted Mar 26, 2019·3 cites·19 claims
- 0481US10410349B2Selective application of reprojection processing on layer sub-regions for optimizing late stage reprojection powerMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2017·Granted Sep 10, 2019·3 cites·21 claims
- 0581US10255891B2No miss cache structure for real-time image transformations with multiple LSR processing enginesMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2017·Granted Apr 9, 2019·3 cites·21 claims
- 0674US10241470B2No miss cache structure for real-time image transformations with data compressionMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2018·Granted Mar 26, 2019·1 cites·23 claims
- 0754US10338816B2Reducing negative effects of insufficient data throughput for real-time processingMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2018·Granted Jul 2, 2019·0 cites·20 claims
- 0852US10095408B2Reducing negative effects of insufficient data throughput for real-time processingMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2017·Granted Oct 9, 2018·0 cites·20 claims
- 0951US8099562B2Scalable interface for a memory arrayBARRETT WAYNE M·Filed 2008·Granted Jan 17, 2012·0 cites·16 claims
- 1042US10514753B2Selectively applying reprojection processing to multi-layer scenes for optimizing late stage reprojection powerMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2017·Granted Dec 24, 2019·0 cites·25 claims
- 1133US2006253659A1Method and virtual port register array for implementing shared access to a register array port by multiple sourcesIBM·Filed 2005·Application pending·0 cites
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