Inventor · disambiguated record
Stefanos Sidiropoulos
Also filed as: SIDIROPOULOS STEFANOS · SIDIROPOULOS STEFANOS S
97 granted patents·5 pending applications·4,276 citations·filing 1997–2024
99Inventor score
Files withRAMBUS INC68NETLOGIC MICROSYSTEMS INC7SIDIROPOULOS STEFANOS6NET LOGIC MICROSYSTEMS INC2NIKAEEN PARASTOO2
Top patents by PatentIndex Score
102 records- 0199US8199859B2Integrating receiver with precharge circuitryZERBE JARED L·Filed 2010·Granted Jun 12, 2012·142 cites·31 claims
- 0299US7548601B2Slave device with synchronous interface for use in synchronous memory systemRAMBUS INC·Filed 2007·Granted Jun 16, 2009·71 cites·15 claims
- 0399US7456778B2Method and apparatus for calibrating a multi-level current mode driver having a plurality of source calibration signalsRAMBUS INC·Filed 2006·Granted Nov 25, 2008·80 cites·24 claims
- 0499US7003618B2System featuring memory modules that include an integrated circuit buffer devicesRAMBUS INC·Filed 2005·Granted Feb 21, 2006·103 cites·24 claims
- 0599US7000062B2System and method featuring a controller device and a memory module that includes an integrated circuit buffer device and a plurality of integrated circuit memory devicesRAMBUS INC·Filed 2005·Granted Feb 14, 2006·185 cites·28 claims
- 0699US6839393B1Apparatus and method for controlling a master/slave system via master device synchronizationRAMBUS INC·Filed 1999·Granted Jan 4, 2005·292 cites·74 claims
- 0799US6643787B1Bus system optimizationRAMBUS INC·Filed 1999·Granted Nov 4, 2003·424 cites·6 claims
- 0899US6502161B1Memory system including a point-to-point linked memory subsystemRAMBUS INC·Filed 2000·Granted Dec 31, 2002·596 cites·49 claims
- 0998US7443215B1Methods and apparatus to increase the resolution of a clock synthesis circuit that uses feedback interpolationNETLOGIC MICROSYSTEMS INC·Filed 2007·Granted Oct 28, 2008·32 cites·13 claims
- 1098US7010642B2System featuring a controller device and a memory module that includes an integrated circuit buffer device and a plurality of integrated circuit memory devicesRAMBUS INC·Filed 2004·Granted Mar 7, 2006·119 cites·44 claims
- 1198US6950956B2Integrated circuit with timing adjustment mechanism and methodRAMBUS INC·Filed 2003·Granted Sep 27, 2005·169 cites·21 claims
- 1298US6920540B2Timing calibration apparatus and method for a memory device signaling systemRAMBUS INC·Filed 2002·Granted Jul 19, 2005·128 cites·67 claims
- 1398US6772351B1Method and apparatus for calibrating a multi-level current mode driverRAMBUS INC·Filed 2000·Granted Aug 3, 2004·139 cites·21 claims
- 1497US7535933B2Calibrated data communication system and methodRAMBUS INC·Filed 2006·Granted May 19, 2009·58 cites·17 claims
- 1597US7323916B1Methods and apparatus for generating multiple clocks using feedback interpolationNETLOGIC MICROSYSTEMS INC·Filed 2005·Granted Jan 29, 2008·97 cites·14 claims
- 1697US7042914B2Calibrated data communication system and methodRAMBUS INC·Filed 2003·Granted May 9, 2006·93 cites·17 claims
- 1797US6928128B1Clock alignment circuit having a self regulating voltage supplyRAMBUS INC·Filed 1999·Granted Aug 9, 2005·157 cites·21 claims
- 1897US6469555B1Apparatus and method for generating multiple clock signals from a single loop circuitRAMBUS INC·Filed 2000·Granted Oct 22, 2002·113 cites·7 claims
- 1996US7532697B1Methods and apparatus for clock and data recovery using a single sourceNET LOGIC MICROSYSTEMS INC·Filed 2005·Granted May 12, 2009·75 cites·14 claims
- 2096US7436229B2Methods and apparatus for minimizing jitter in a clock synthesis circuit that uses feedback interpolationNET LOGIC MICROSYSTEMS INC·Filed 2007·Granted Oct 14, 2008·39 cites·20 claims
- 2196US7124221B1Low latency multi-level communication interfaceRAMBUS INC·Filed 2000·Granted Oct 17, 2006·78 cites·37 claims
- 2296US6133773AVariable delay elementRAMBUS INC·Filed 1997·Granted Oct 17, 2000·141 cites·27 claims
- 2395US9998305B2Multi-PAM output driver with distortion compensationRAMBUS INC·Filed 2017·Granted Jun 12, 2018·9 cites·20 claims
- 2495US7320047B2System having a controller device, a buffer device and a plurality of memory devicesRAMBUS INC·Filed 2005·Granted Jan 15, 2008·30 cites·32 claims
- 2595US7093145B2Method and apparatus for calibrating a multi-level current mode driver having a plurality of source calibration signalsRAMBUS INC·Filed 2004·Granted Aug 15, 2006·68 cites·10 claims
- 2695US6504438B1Dual loop phase lock loops using dual voltage supply regulatorsRAMBUS INC·Filed 2001·Granted Jan 7, 2003·57 cites·35 claims
- 2794US9785589B2Memory controller that calibrates a transmit timing offsetRAMBUS INC·Filed 2016·Granted Oct 10, 2017·7 cites·21 claims
- 2894US7626442B2Low latency multi-level communication interfaceRAMBUS INC·Filed 2006·Granted Dec 1, 2009·21 cites·24 claims
- 2994US7432750B1Methods and apparatus for frequency synthesis with feedback interpolationNETLOGIC MICROSYSTEMS INC·Filed 2005·Granted Oct 7, 2008·27 cites·18 claims
- 3093US8634452B2Multiphase receiver with equalization circuitryZERBE JARED L·Filed 2012·Granted Jan 21, 2014·10 cites·26 claims
- 3193US7702057B2Apparatus and method for controlling a master/slave system via master device synchronizationRAMBUS INC·Filed 2008·Granted Apr 20, 2010·16 cites·10 claims
- 3292US10192609B2Memory component with pattern register circuitry to provide data patterns for calibrationRAMBUS INC·Filed 2017·Granted Jan 29, 2019·6 cites·20 claims
- 3392US7965567B2Phase adjustment apparatus and method for a memory device signaling systemRAMBUS INC·Filed 2007·Granted Jun 21, 2011·14 cites·25 claims
- 3492US7668276B2Phase adjustment apparatus and method for a memory device signaling systemRAMBUS INC·Filed 2002·Granted Feb 23, 2010·37 cites·26 claims
- 3592US6323706B1Apparatus and method for edge based duty cycle conversionRAMBUS INC·Filed 2000·Granted Nov 27, 2001·43 cites·26 claims
- 3691US9405678B2Flash memory controller with calibrated data communicationRAMBUS INC·Filed 2015·Granted Aug 2, 2016·5 cites·20 claims
- 3791US8170067B2Memory system with calibrated data communicationZERBE JARED LEVAN·Filed 2009·Granted May 1, 2012·16 cites·20 claims
- 3890US8618967B2Systems, circuits, and methods for a sigma-delta based time to digital converterNIKAEEN PARASTOO·Filed 2012·Granted Dec 31, 2013·15 cites·20 claims
- 3990US7206897B2Memory module having an integrated circuit buffer deviceRAMBUS INC·Filed 2005·Granted Apr 17, 2007·14 cites·32 claims
- 4089US9367248B2Memory component with pattern register circuitry to provide data patterns for calibrationRAMBUS INC·Filed 2015·Granted Jun 14, 2016·5 cites·20 claims
- 4189US9099194B2Memory component with pattern register circuitry to provide data patterns for calibrationRAMBUS INC·Filed 2013·Granted Aug 4, 2015·6 cites·20 claims
- 4289US7017002B2System featuring a master device, a buffer device and a plurality of integrated circuit memory devicesRAMBUS INC·Filed 2004·Granted Mar 21, 2006·30 cites·37 claims
- 4389US6448828B2Apparatus and method for edge based duty cycle conversionRAMBUS INC·Filed 2001·Granted Sep 10, 2002·33 cites·48 claims
- 4488US7809088B2Multiphase receiver with equalizationRAMBUS INC·Filed 2009·Granted Oct 5, 2010·9 cites·24 claims
- 4587US9164933B2Memory system with calibrated data communicationRAMBUS INC·Filed 2015·Granted Oct 20, 2015·3 cites·20 claims
- 4687US7206896B2Integrated circuit buffer deviceRAMBUS INC·Filed 2005·Granted Apr 17, 2007·11 cites·23 claims
- 4787US7062597B2Integrated circuit buffer deviceRAMBUS INC·Filed 2003·Granted Jun 13, 2006·33 cites·53 claims
- 4887US7051151B2Integrated circuit buffer deviceRAMBUS INC·Filed 2002·Granted May 23, 2006·33 cites·64 claims
- 4987US6553452B2Synchronous memory device having a temperature registerRAMBUS INC·Filed 2002·Granted Apr 22, 2003·31 cites·45 claims
- 5086US9544169B2Multiphase receiver with equalization circuitryRAMBUS INC·Filed 2014·Granted Jan 10, 2017·4 cites·20 claims
Showing the top 50 of 102 patent records by PatentIndex Score.
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