Inventor · disambiguated record
Tsung-Chieh Ho
Also filed as: HO TSUNG-CHIEH
2 granted patents·1 pending application·7 citations·filing 2006–2007
46Inventor score
Files withADVANCED SEMICONDUCTOR ENG3
Top patents by PatentIndex Score
3 records- 0172US7518241B2Wafer structure with a multi-layer barrier in an UBM layer network device with power supplyADVANCED SEMICONDUCTOR ENG·Filed 2006·Granted Apr 14, 2009·7 cites·14 claims
- 0232US7727878B2Method for forming passivation layerADVANCED SEMICONDUCTOR ENG·Filed 2006·Granted Jun 1, 2010·0 cites·16 claims
- 0330US2008044774A1Method for exposing twice by two masks in semiconductor processADVANCED SEMICONDUCTOR ENG·Filed 2007·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →