Inventor · disambiguated record

Jovanka Ciric

Also filed as: CIRIC JOVANKA

2 granted patents·52 citations·filing 2002–2005

65Inventor score

Technology areasG06F

Files withSYNOPSYS INC1 SYNPLICITY INC1

Top patents by PatentIndex Score

2 records

0182US6973632B1Method and apparatus to estimate delay for logic circuit optimizationSYNPLICITY INC·Filed 2002·Granted Dec 6, 2005·39 cites·72 claims
0281US7434187B2Method and apparatus to estimate delay for logic circuit optimizationSYNOPSYS INC·Filed 2005·Granted Oct 7, 2008·13 cites·28 claims

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