Inventor · disambiguated record
Sreeni Maheshwarla
Also filed as: MAHESHWARLA SREENI
1 granted patent·2 pending applications·0 citations·filing 2002–2006
6Inventor score
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3 records- 0133US2007288881A1Method of merging designs of an integrated circuit from a plurality of sourcesMAHESHWARLA SREENI·Filed 2006·Application pending·0 cites
- 0224US6878591B2Self aligned method of forming non-volatile memory cells with flat word lineSILICON STORAGE TECH INC·Filed 2002·Granted Apr 12, 2005·0 cites·17 claims
- 0320US2004238877A1Electrically programmable and erasable memory cell having an improved floating gate and a method of manufacturing said floating gate and a memory device having an array of such cells made therebyFiled 2003·Application pending·0 cites
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