Inventor · disambiguated record
Narayanan Balasubramanian
Also filed as: BALASUBRAMANIAN NARAYANAN · BALASUBRAMANIAN NARAYANAN T
15 granted patents·2 pending applications·408 citations·filing 1996–2007
94Inventor score
Files withAGENCY SCIENCE TECH & RES6CHARTERED SEMICONDUCTOR MFG3INST OF MICROELECTRONICS3AGARWAL AJAY1AGENCY FOR SCEINCE TECHNOLOGY1
Top patents by PatentIndex Score
17 records- 0192US7294890B2Fully salicided (FUSA) MOSFET structureAGENCY SCIENCE TECH & RES·Filed 2005·Granted Nov 13, 2007·24 cites·20 claims
- 0287US7425751B2Method to reduce junction leakage current in strained silicon on silicon-germanium devicesAGENCY SCIENCE TECH & RES·Filed 2005·Granted Sep 16, 2008·11 cites·12 claims
- 0387US6468853B1Method of fabricating a shallow trench isolation structure with reduced local oxide recess near cornerCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Oct 22, 2002·83 cites·46 claims
- 0486US5767004AMethod for forming a low impurity diffusion polysilicon layerCHARTERED SEMICONDUCTOR MFG·Filed 1996·Granted Jun 16, 1998·108 cites·22 claims
- 0583US8236595B2Nanowire sensor, nanowire sensor array and method of fabricating the sameAGARWAL AJAY·Filed 2006·Granted Aug 7, 2012·12 cites·33 claims
- 0683US6846720B2Method to reduce junction leakage current in strained silicon on silicon-germanium devicesAGENCY SCIENCE TECH & RES·Filed 2003·Granted Jan 25, 2005·26 cites·19 claims
- 0781US7316950B2Method of fabricating a CMOS device with dual metal gate electrodesUNIV SINGAPORE·Filed 2004·Granted Jan 8, 2008·29 cites·11 claims
- 0878US6235591B1Method to form gate oxides of different thicknesses on a silicon substrateCHARTERED SEMICONDUCTOR MFG CO·Filed 1999·Granted May 22, 2001·46 cites·20 claims
- 0975US7397090B2Gate electrode architecture for improved work function tuning and method of manufactureAGENCY SCIENCE TECH & RES·Filed 2005·Granted Jul 8, 2008·7 cites·8 claims
- 1072US7682914B2Fully salicided (FUCA) MOSFET structureAGENCY FOR SCIENCE TECHNOLOLGY·Filed 2007·Granted Mar 23, 2010·6 cites·20 claims
- 1172US6551937B2Process for device using partial SOIINST OF MICROELECTRONICS·Filed 2001·Granted Apr 22, 2003·25 cites·21 claims
- 1267US6489203B2Stacked LDD high frequency LDMOSFETINST OF MICROELECTRONICS·Filed 2001·Granted Dec 3, 2002·12 cites·8 claims
- 1363US6200887B1Method to form a smooth gate polysilicon sidewall in the fabrication of integrated circuitsCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Mar 13, 2001·10 cites·23 claims
- 1458US7439165B2Method of fabricating tensile strained layers and compressive strain layers for a CMOS deviceAGENCY FOR SCEINCE TECHNOLOGY·Filed 2005·Granted Oct 21, 2008·4 cites·13 claims
- 1555US6664596B2Stacked LDD high frequency LDMOSFETINST OF MICROELECTRONICS·Filed 2002·Granted Dec 16, 2003·5 cites·13 claims
- 1641US2010055673A1Transparent microfluidic deviceAGENCY SCIENCE TECH & RES·Filed 2006·Application pending·0 cites
- 1734US2005056827A1CMOS compatible low band offset double barrier resonant tunneling diodeAGENCY SCIENCE TECH & RES·Filed 2004·Application pending·0 cites
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