Inventor · disambiguated record
William George Petefish
Also filed as: PETEFISH WILLIAM · PETEFISH WILLIAM G · PETEFISH WILLIAM GEORGE
15 granted patents·1 pending application·952 citations·filing 1992–2002
96Inventor score
Files withGORE & ASS9GORE ENTERPRISE HOLDINGS INC33M INNOVATIVE PROPERTIES CO1SUPERCOMPUTER SYSTEMS LTD1
Top patents by PatentIndex Score
16 records- 0197US6847527B2Interconnect module with reduced power distribution impedance3M INNOVATIVE PROPERTIES CO·Filed 2002·Granted Jan 25, 2005·127 cites·63 claims
- 0293US6015722AMethod for assembling an integrated circuit chip package having an underfill material between a chip and a substrateGORE ENTERPRISE HOLDINGS INC·Filed 1999·Granted Jan 18, 2000·143 cites·2 claims
- 0390US5919329AMethod for assembling an integrated circuit chip package having at least one semiconductor deviceGORE ENTERPRISE HOLDINGS INC·Filed 1998·Granted Jul 6, 1999·102 cites·1 claims
- 0488US5879787AMethod and apparatus for improving wireability in chip modulesGORE & ASS·Filed 1996·Granted Mar 9, 1999·98 cites·2 claims
- 0584US6011697AConstraining ring for use in electronic packagingGORE & ASS·Filed 1998·Granted Jan 4, 2000·43 cites·17 claims
- 0684US5276955AMultilayer interconnect system for an area array interconnection using solid state diffusionSUPERCOMPUTER SYSTEMS LTD·Filed 1992·Granted Jan 11, 1994·99 cites·29 claims
- 0782US5868887AMethod for minimizing warp and die stress in the production of an electronic assemblyGORE & ASS·Filed 1996·Granted Feb 9, 1999·61 cites·9 claims
- 0880US5525834AIntegrated circuit packageGORE & ASS·Filed 1994·Granted Jun 11, 1996·68 cites·26 claims
- 0978US5970319AMethod for assembling an integrated circuit chip package having at least one semiconductor deviceGORE ENTERPRISE HOLDINGS INC·Filed 1999·Granted Oct 19, 1999·46 cites·2 claims
- 1077US6027590AMethod for minimizing warp and die stress in the production of an electronic assemblyGORE & ASS·Filed 1998·Granted Feb 22, 2000·44 cites·12 claims
- 1176US6184589B1Constraining ring for use in electronic packagingFiled 1998·Granted Feb 6, 2001·39 cites·7 claims
- 1273US5701032AIntegrated circuit packageGORE & ASS·Filed 1995·Granted Dec 23, 1997·48 cites·3 claims
- 1349US5879786AConstraining ring for use in electronic packagingGORE & ASS·Filed 1996·Granted Mar 9, 1999·11 cites·6 claims
- 1446US5853517AMethod for coining solder balls on an electrical circuit packageGORE & ASS·Filed 1996·Granted Dec 29, 1998·14 cites·8 claims
- 1538US5882459AMethod for aligning and laminating substrates to stiffeners in electrical circuitsGORE & ASS·Filed 1996·Granted Mar 16, 1999·9 cites·9 claims
- 1623US2002045036A1Bga solder ball shear strengthFiled 1999·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →