Inventor · disambiguated record
Sarah C. Prue
Also filed as: PRUE SARAH C
3 granted patents·11 citations·filing 2005–2008
63Inventor score
Technology areasG06F
Files withIBM3
Top patents by PatentIndex Score
3 records- 0175US7240306B2Integrated circuit layout critical area determination using Voronoi diagrams and shape biasingIBM·Filed 2005·Granted Jul 3, 2007·8 cites·20 claims
- 0262US7389480B2Content based yield prediction of VLSI designsIBM·Filed 2005·Granted Jun 17, 2008·2 cites·6 claims
- 0359US7661081B2Content based yield prediction of VLSI designsIBM·Filed 2008·Granted Feb 9, 2010·1 cites·14 claims
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →