Inventor · disambiguated record
Praveen Mosalikanti
Also filed as: MOSALIKANTI PRAVEEN
22 granted patents·5 pending applications·61 citations·filing 2006–2023
93Inventor score
Top patents by PatentIndex Score
27 records- 0197US10928886B2Frequency overshoot and voltage droop mitigation apparatus and methodINTEL CORP·Filed 2019·Granted Feb 23, 2021·12 cites·20 claims
- 0295US10707877B1Method and apparatus for switched adaptive clockingINTEL CORP·Filed 2019·Granted Jul 7, 2020·14 cites·20 claims
- 0389US10790838B1Method and apparatus to perform dynamic frequency scaling while a phase-locked loop operates in a closed loopINTEL CORP·Filed 2019·Granted Sep 29, 2020·9 cites·20 claims
- 0486US11048284B2Self-referenced droop detector circuitryINTEL CORP·Filed 2019·Granted Jun 29, 2021·2 cites·20 claims
- 0583US10423182B2Self-referenced droop detector circuitryINTEL CORP·Filed 2017·Granted Sep 24, 2019·4 cites·18 claims
- 0679US9450589B2Clock generation system with dynamic distribution bypass modeINTEL CORP·Filed 2013·Granted Sep 20, 2016·4 cites·22 claims
- 0778US12306696B2Frequency overshoot and voltage droop mitigation apparatus and methodINTEL CORP·Filed 2023·Granted May 20, 2025·0 cites·17 claims
- 0874US8248124B2Methods and apparatuses for delay-locked loops and phase-locked loopsMOSALIKANTI PRAVEEN·Filed 2010·Granted Aug 21, 2012·4 cites·23 claims
- 0968US11847011B2Frequency overshoot and voltage droop mitigation apparatus and methodINTEL CORP·Filed 2021·Granted Dec 19, 2023·0 cites·11 claims
- 1064US8552781B2Digital quadrature phase correctionMOSALIKANTI PRAVEEN·Filed 2009·Granted Oct 8, 2013·4 cites·8 claims
- 1164US8502612B2Method and apparatus for determining within-die and across-die variation of analog circuitsMOSALIKANTI PRAVEEN·Filed 2011·Granted Aug 6, 2013·1 cites·18 claims
- 1264US8258837B2Controlled clock phase generationMOSALIKANTI PRAVEEN·Filed 2009·Granted Sep 4, 2012·4 cites·18 claims
- 1361US11461504B2Apparatus for autonomous security and functional safety of clock and voltages including adjustment of a divider ratioINTEL CORP·Filed 2020·Granted Oct 4, 2022·0 cites·21 claims
- 1460US11211934B2Apparatus to improve lock time of a frequency locked loopINTEL CORP·Filed 2020·Granted Dec 28, 2021·0 cites·16 claims
- 1560US8350610B2Method and apparatus for fast wake-up of analog biasesINTEL CORP·Filed 2010·Granted Jan 8, 2013·2 cites·17 claims
- 1655US10824764B2Apparatus for autonomous security and functional safety of clock and voltagesINTEL CORP·Filed 2018·Granted Nov 3, 2020·0 cites·20 claims
- 1754US9836078B2Clock generation system with dynamic distribution bypass modeINTEL CORP·Filed 2016·Granted Dec 5, 2017·0 cites·20 claims
- 1852US2024077924A1Power regulation circuit for droop mitigation in a power source voltage that powers a processing coreINTEL CORP·Filed 2022·Application pending·0 cites
- 1951US10790832B2Apparatus to improve lock time of a frequency locked loopINTEL CORP·Filed 2018·Granted Sep 29, 2020·0 cites·26 claims
- 2051US8031017B2Method and apparatus for determining within-die and across-die variation of analog circuitsINTEL CORP·Filed 2009·Granted Oct 4, 2011·1 cites·20 claims
- 2148US2025208638A1Level shift and functional circuits with eos protectionINTEL CORP·Filed 2023·Application pending·0 cites
- 2247US10614774B2Device, method and system for on-chip generation of a reference clock signalINTEL CORP·Filed 2018·Granted Apr 7, 2020·0 cites·17 claims
- 2346US11188117B2Low latency analog adaptive clockingINTEL CORP·Filed 2018·Granted Nov 30, 2021·0 cites·22 claims
- 2445US2009243659A1Method and device for detecting the absence of a periodic signalMOSALIKANTI PRAVEEN·Filed 2008·Application pending·0 cites
- 2543US2025211238A1Die-to-die clock signalling including adaptive frequency delay-locked loopINTEL CORP·Filed 2023·Application pending·0 cites
- 2636US7602663B2Fuse cell array with redundancy featuresINTEL CORP·Filed 2006·Granted Oct 13, 2009·0 cites·18 claims
- 2732US2007217247A1Shared sense amplifier for fuse cellCHEN ZHANPING·Filed 2006·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →