Inventor · disambiguated record
Andrew M. Fuller
Also filed as: FULLER ANDREW · FULLER ANDREW M
21 granted patents·3 pending applications·108 citations·filing 2008–2025
95Inventor score
Top patents by PatentIndex Score
24 records- 0198US11556164B2Memory IC with data loopbackRAMBUS INC·Filed 2020·Granted Jan 17, 2023·6 cites·20 claims
- 0297US11960344B2Memory controller with looped-back calibration data receiverRAMBUS INC·Filed 2022·Granted Apr 16, 2024·2 cites·20 claims
- 0396US10331193B2Signaling interface with phase and framing calibrationRAMBUS INC·Filed 2017·Granted Jun 25, 2019·13 cites·20 claims
- 0496US9229523B2Memory controller with transaction-queue-dependent power modesRAMBUS INC·Filed 2015·Granted Jan 5, 2016·13 cites·22 claims
- 0596US9043633B2Memory controller with transaction-queue-monitoring power mode circuitryRAMBUS INC·Filed 2014·Granted May 26, 2015·13 cites·20 claims
- 0695US8918669B2Mesochronous signaling system with clock-stopped low power modeWARE FREDERICK A·Filed 2009·Granted Dec 23, 2014·21 cites·20 claims
- 0794US11127444B1Signal receiver with skew-tolerant strobe gatingRAMBUS INC·Filed 2020·Granted Sep 21, 2021·3 cites·21 claims
- 0892US8918667B2Mesochronous signaling system with core-clock synchronizationWARE FREDERICK A·Filed 2009·Granted Dec 23, 2014·14 cites·20 claims
- 0991US10901485B2Clock-forwarding memory controller with mesochronously-clocked signaling interfaceRAMBUS INC·Filed 2019·Granted Jan 26, 2021·3 cites·26 claims
- 1088US12314113B2Memory controller operable in data loop-back modeRAMBUS INC·Filed 2024·Granted May 27, 2025·0 cites·21 claims
- 1186US2025328181A1Memory with data loop-backRAMBUS INC·Filed 2025·Application pending·0 cites
- 1285US9753521B2Chip-to-chip signaling link timing calibrationRAMBUS INC·Filed 2015·Granted Sep 5, 2017·2 cites·20 claims
- 1384US11763865B1Signal receiver with skew-tolerant strobe gatingRAMBUS INC·Filed 2021·Granted Sep 19, 2023·1 cites·21 claims
- 1482US8199866B2Edge-based sampler offset correctionFULLER ANDREW M·Filed 2008·Granted Jun 12, 2012·11 cites·24 claims
- 1579US2024428835A1Signal receiver with skew-tolerant strobe gatingRAMBUS INC·Filed 2024·Application pending·0 cites
- 1678US12062413B1Signal receiver with skew-tolerant strobe gatingRAMBUS INC·Filed 2023·Granted Aug 13, 2024·0 cites·21 claims
- 1777US2025328457A1Circuits and methods for self-adaptive decision-feedback equalization in a memory systemRAMBUS INC·Filed 2025·Application pending·0 cites
- 1864US8310294B2Low-power clock generation and distribution circuitryPOULTON JOHN W·Filed 2008·Granted Nov 13, 2012·4 cites·40 claims
- 1963US12489598B2Phase-based lock detector with programmable frequency offset toleranceRAMBUS INC·Filed 2023·Granted Dec 2, 2025·0 cites·18 claims
- 2063US11677391B1Low-power multi-domain synchronizerRAMBUS INC·Filed 2022·Granted Jun 13, 2023·0 cites·21 claims
- 2160US12314162B2Circuits and methods for self-adaptive decision-feedback equalization in a memory systemRAMBUS INC·Filed 2021·Granted May 27, 2025·0 cites·18 claims
- 2260US9419598B2In-situ delay element calibrationRAMBUS INC·Filed 2014·Granted Aug 16, 2016·1 cites·20 claims
- 2358US8509094B2Edge-based loss-of-signal detectionFULLER ANDREW M·Filed 2008·Granted Aug 13, 2013·1 cites·27 claims
- 2456US11955971B2Integrated transmitter slew rate calibrationRAMBUS INC·Filed 2022·Granted Apr 9, 2024·0 cites·20 claims
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