Inventor · disambiguated record
Benedict Lau
Also filed as: LAU BENEDICT · LAU BENEDICT C · LAU BENEDICT CHUNG-KWONG
100 granted patents·4 pending applications·3,889 citations·filing 1997–2023
99Inventor score
Top patents by PatentIndex Score
104 records- 0199US6924660B2Calibration methods and circuits for optimized on-die terminationRAMBUS INC·Filed 2003·Granted Aug 2, 2005·152 cites·32 claims
- 0299US6759881B2System with phase jumping locked loop circuitRAMBUS INC·Filed 2003·Granted Jul 6, 2004·89 cites·25 claims
- 0399US6643787B1Bus system optimizationRAMBUS INC·Filed 1999·Granted Nov 4, 2003·424 cites·6 claims
- 0499US6539072B1Delay locked loop circuitry for clock delay adjustmentRAMBUS INC·Filed 2000·Granted Mar 25, 2003·263 cites·31 claims
- 0599US6125157ADelay-locked loop circuitry for clock delay adjustmentRAMBUS INC·Filed 1997·Granted Sep 26, 2000·382 cites·20 claims
- 0698US11302368B2Memory device with circuitry to transmit feedback indicative of a phase relationshipRAMBUS INC·Filed 2020·Granted Apr 12, 2022·4 cites·20 claims
- 0798US10902891B2Memory controller with staggered request signal outputRAMBUS INC·Filed 2020·Granted Jan 26, 2021·5 cites·20 claims
- 0898US7321524B2Memory controller with staggered request signal outputRAMBUS INC·Filed 2005·Granted Jan 22, 2008·42 cites·14 claims
- 0998US7151390B2Calibration methods and circuits for optimized on-die terminationRAMBUS INC·Filed 2005·Granted Dec 19, 2006·94 cites·19 claims
- 1098US7046056B2System with dual rail regulated locked loopRAMBUS INC·Filed 2005·Granted May 16, 2006·46 cites·20 claims
- 1198US6950956B2Integrated circuit with timing adjustment mechanism and methodRAMBUS INC·Filed 2003·Granted Sep 27, 2005·169 cites·21 claims
- 1297US11830573B2Memory controller with staggered request signal outputRAMBUS INC·Filed 2022·Granted Nov 28, 2023·2 cites·20 claims
- 1397US7535933B2Calibrated data communication system and methodRAMBUS INC·Filed 2006·Granted May 19, 2009·58 cites·17 claims
- 1497US7042914B2Calibrated data communication system and methodRAMBUS INC·Filed 2003·Granted May 9, 2006·93 cites·17 claims
- 1597US6469555B1Apparatus and method for generating multiple clock signals from a single loop circuitRAMBUS INC·Filed 2000·Granted Oct 22, 2002·113 cites·7 claims
- 1696US9691447B2Memory controller with staggered request signal outputRAMBUS INC·Filed 2015·Granted Jun 27, 2017·12 cites·20 claims
- 1796US8743635B2Memory controller for strobe-based memory systemsKIZER JADE M·Filed 2012·Granted Jun 3, 2014·18 cites·20 claims
- 1896US8638637B2Memory controller with staggered request signal outputRAMBUS INC·Filed 2012·Granted Jan 28, 2014·13 cites·20 claims
- 1996US6509756B1Method and apparatus for low capacitance, high output impedance driverRAMBUS INC·Filed 2001·Granted Jan 21, 2003·96 cites·20 claims
- 2096US6369652B1Differential amplifiers with current and resistance compensation elements for balanced outputRAMBUS INC·Filed 2000·Granted Apr 9, 2002·97 cites·29 claims
- 2196US6133773AVariable delay elementRAMBUS INC·Filed 1997·Granted Oct 17, 2000·141 cites·27 claims
- 2295US10593379B2Memory controller with staggered request signal outputRAMBUS INC·Filed 2018·Granted Mar 17, 2020·6 cites·20 claims
- 2395US10062421B2Memory controller with staggered request signal outputRAMBUS INC·Filed 2017·Granted Aug 28, 2018·6 cites·20 claims
- 2495US9390777B2Memory controller for strobe-based memory systemsRAMBUS INC·Filed 2015·Granted Jul 12, 2016·8 cites·20 claims
- 2595US8089824B2Memory controller with staggered request signal outputSHAEFFER IAN P·Filed 2009·Granted Jan 3, 2012·25 cites·54 claims
- 2695US7928757B2Calibration methods and circuits to calibrate drive current and termination impedanceRAMBUS INC·Filed 2010·Granted Apr 19, 2011·18 cites·28 claims
- 2795US7558150B2Memory controller with staggered request signal outputRAMBUS INC·Filed 2007·Granted Jul 7, 2009·22 cites·11 claims
- 2894US9905286B2Memory controller for strobe-based memory systemsRAMBUS INC·Filed 2017·Granted Feb 27, 2018·8 cites·20 claims
- 2994US9785589B2Memory controller that calibrates a transmit timing offsetRAMBUS INC·Filed 2016·Granted Oct 10, 2017·7 cites·21 claims
- 3094US9165617B2Memory controller with staggered request signal outputRAMBUS INC·Filed 2014·Granted Oct 20, 2015·12 cites·20 claims
- 3194US8339878B2Integrated circuit with staggered signal outputSHAEFFER IAN P·Filed 2011·Granted Dec 25, 2012·15 cites·27 claims
- 3294US8278968B2Calibration methods and circuits to calibrate drive current and termination impedanceNGUYEN HUY M·Filed 2011·Granted Oct 2, 2012·9 cites·21 claims
- 3394US7741868B2Calibration methods and circuits to calibrate drive current and termination impedanceRAMBUS INC·Filed 2009·Granted Jun 22, 2010·17 cites·23 claims
- 3494US7095265B2PVT-compensated clock distributionRAMBUS INC·Filed 2005·Granted Aug 22, 2006·30 cites·16 claims
- 3593US11450374B2Memory controller for strobe-based memory systemsRAMBUS INC·Filed 2020·Granted Sep 20, 2022·2 cites·20 claims
- 3693US9191243B2Calibration methods and circuits to calibrate drive current and termination impedanceNGUYEN HUY M·Filed 2012·Granted Nov 17, 2015·8 cites·16 claims
- 3793US7525338B2Calibration methods and circuits for optimized on-die terminationRAMBUS INC·Filed 2006·Granted Apr 28, 2009·14 cites·21 claims
- 3893US6760857B1System having both externally and internally generated clock signals being asserted on the same clock pin in normal and test modes of operation respectivelyRAMBUS INC·Filed 2000·Granted Jul 6, 2004·68 cites·33 claims
- 3993US6047346ASystem for adjusting slew rate on an output of a drive circuit by enabling a plurality of pre-drivers and a plurality of output driversRAMBUS INC·Filed 1998·Granted Apr 4, 2000·268 cites·24 claims
- 4092US10861532B2Memory controller for strobe-based memory systemsRAMBUS INC·Filed 2019·Granted Dec 8, 2020·3 cites·20 claims
- 4192US6952123B2System with dual rail regulated locked loopRAMBUS INC·Filed 2003·Granted Oct 4, 2005·37 cites·64 claims
- 4292US6806728B2Circuit and method for interfacing to a bus channelRAMBUS INC·Filed 2001·Granted Oct 19, 2004·89 cites·55 claims
- 4392US6727759B2Collective automatic gain controlRAMBUS INC·Filed 2003·Granted Apr 27, 2004·35 cites·23 claims
- 4492US6462588B2Asymmetry control for an output driverRAMBUS INC·Filed 2000·Granted Oct 8, 2002·86 cites·22 claims
- 4591US9405678B2Flash memory controller with calibrated data communicationRAMBUS INC·Filed 2015·Granted Aug 2, 2016·5 cites·20 claims
- 4691US8170067B2Memory system with calibrated data communicationZERBE JARED LEVAN·Filed 2009·Granted May 1, 2012·16 cites·20 claims
- 4791US8151133B2Method for calibrating read operations in a memory systemKIZER JADE M·Filed 2009·Granted Apr 3, 2012·13 cites·21 claims
- 4891US7543172B2Strobe masking in a signaling system having multiple clock domainsRAMBUS INC·Filed 2004·Granted Jun 2, 2009·36 cites·44 claims
- 4991US7307461B2System and method for adaptive duty cycle optimizationRAMBUS INC·Filed 2003·Granted Dec 11, 2007·62 cites·42 claims
- 5091US7081782B2Locked loop with dual rail regulationRAMBUS INC·Filed 2005·Granted Jul 25, 2006·19 cites·18 claims
Showing the top 50 of 104 patent records by PatentIndex Score.
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