Inventor · disambiguated record
Darius D. Gaskins
Also filed as: GASKINS DARIUS · GASKINS DARIUS D
95 granted patents·6 pending applications·1,771 citations·filing 1990–2018
99Inventor score
Top patents by PatentIndex Score
101 records- 0196US7441064B2Flexible width data protocolVIA TECH INC·Filed 2006·Granted Oct 21, 2008·62 cites·20 claims
- 0295US5245231AIntegrated delay lineDELL USA LP·Filed 1991·Granted Sep 14, 1993·97 cites·14 claims
- 0394US5261068ADual path memory retrieval system for an interleaved dynamic RAM memory unitDELL USA LP·Filed 1990·Granted Nov 9, 1993·249 cites·32 claims
- 0491US7814350B2Microprocessor with improved thermal monitoring and protection mechanismVIA TECH INC·Filed 2007·Granted Oct 12, 2010·33 cites·24 claims
- 0591US6681311B2Translation lookaside buffer that caches memory type informationIP FIRST LLC·Filed 2001·Granted Jan 20, 2004·71 cites·35 claims
- 0690US8615672B2Multicore processor power credit management to allow all processing cores to operate at elevated frequencyHENRY G GLENN·Filed 2011·Granted Dec 24, 2013·8 cites·36 claims
- 0790US8135970B2Microprocessor that performs adaptive power throttlingGASKINS DARIUS D·Filed 2009·Granted Mar 13, 2012·17 cites·35 claims
- 0888US7698583B2Microprocessor capable of dynamically reducing its power consumption in response to varying operating temperatureVIA TECH INC·Filed 2007·Granted Apr 13, 2010·19 cites·35 claims
- 0988US5802356AConfigurable drive clockINTEGRATED DEVICE TECH·Filed 1996·Granted Sep 1, 1998·148 cites·35 claims
- 1087US7358758B2Apparatus and method for enabling a multi-processor environment on a busVIA TECH INC·Filed 2006·Granted Apr 15, 2008·17 cites·19 claims
- 1186US5432735ATernary storage dynamic RAMDELLUSA L P·Filed 1993·Granted Jul 11, 1995·61 cites·13 claims
- 1285US8276032B2Detection of uncorrectable re-grown fuses in a microprocessorHENRY G GLENN·Filed 2010·Granted Sep 25, 2012·6 cites·21 claims
- 1383US8878580B1Apparatus and method for generating a clock signal with reduced jitterVIA TECH INC·Filed 2013·Granted Nov 4, 2014·6 cites·24 claims
- 1483US8782451B2Power state synchronization in a multi-core processorHENRY G GLENN·Filed 2011·Granted Jul 15, 2014·6 cites·23 claims
- 1583US8412962B2Microprocessor with improved thermal monitoring and protection mechanismGASKINS DARIUS D·Filed 2010·Granted Apr 2, 2013·6 cites·19 claims
- 1683US6549985B1Method and apparatus for resolving additional load misses and page table walks under orthogonal stalls in a single pipeline processorI P FIRST LLC·Filed 2000·Granted Apr 15, 2003·34 cites·20 claims
- 1781US6553473B1Byte-wise tracking on write allocateIP FIRST LLC·Filed 2000·Granted Apr 22, 2003·30 cites·29 claims
- 1881US5463643ARedundant memory channel array configuration with data striping and error correction capabilitiesDELL USA LP·Filed 1994·Granted Oct 31, 1995·86 cites·11 claims
- 1978US7770042B2Microprocessor with improved performance during P-state transitionsVIA TECH INC·Filed 2007·Granted Aug 3, 2010·8 cites·27 claims
- 2078US7411840B2Sense mechanism for microprocessor bus inversionVIA TECH INC·Filed 2004·Granted Aug 12, 2008·25 cites·15 claims
- 2176US8935549B2Microprocessor with multicore processor power credit management featureHENRY G GLENN·Filed 2011·Granted Jan 13, 2015·3 cites·20 claims
- 2276US8914661B2Multicore processor power credit management in which multiple processing cores use shared memory to communicate individual energy consumptionHENRY G GLENN·Filed 2011·Granted Dec 16, 2014·3 cites·34 claims
- 2376US8370684B2Microprocessor with system-robust self-reset capabilityVIA TECH INC·Filed 2010·Granted Feb 5, 2013·4 cites·29 claims
- 2476US8085062B2Configurable bus termination for multi-core/multi-package processor configurationsGASKINS DARIUS D·Filed 2009·Granted Dec 27, 2011·7 cites·24 claims
- 2575US9009512B2Power state synchronization in a multi-core processorVIA TECH INC·Filed 2014·Granted Apr 14, 2015·3 cites·16 claims
- 2675US8631256B2Distributed management of a shared power source to a multi-core microprocessorHENRY G GLENN·Filed 2011·Granted Jan 14, 2014·3 cites·15 claims
- 2774US8930676B2Master core discovering enabled cores in microprocessor comprising plural multi-core diesHENRY G GLENN·Filed 2011·Granted Jan 6, 2015·3 cites·26 claims
- 2873US8635476B2Decentralized power management distributed among multiple processor coresHENRY G GLENN·Filed 2011·Granted Jan 21, 2014·3 cites·20 claims
- 2973US7774627B2Microprocessor capable of dynamically increasing its performance in response to varying operating temperatureVIA TECH INC·Filed 2007·Granted Aug 10, 2010·6 cites·29 claims
- 3073US7290156B2Frequency-voltage mechanism for microprocessor power managementVIA TECH INC·Filed 2004·Granted Oct 30, 2007·18 cites·16 claims
- 3172US8281223B2Detection of fuse re-growth in a microprocessorGASKINS DARIUS D·Filed 2010·Granted Oct 2, 2012·2 cites·20 claims
- 3272US7978001B2Microprocessor with selective substrate biasing for clock-gated functional blocksVIA TECH INC·Filed 2008·Granted Jul 12, 2011·7 cites·16 claims
- 3372US6581150B1Apparatus and method for improved non-page fault loads and storesIP FIRST LLC·Filed 2000·Granted Jun 17, 2003·17 cites·30 claims
- 3471US7767492B1Location-based bus termination for multi-core/multi-package processor configurationsVIA TECH INC·Filed 2009·Granted Aug 3, 2010·4 cites·21 claims
- 3570US10635453B2Dynamic reconfiguration of multi-core processorVIA TECH INC·Filed 2018·Granted Apr 28, 2020·0 cites·29 claims
- 3670US7843225B2Protocol-based bus termination for multi-core processorsVIA TECH INC·Filed 2009·Granted Nov 30, 2010·4 cites·21 claims
- 3770US5903911ACache-based computer system employing memory control circuit and method for write allocation and data prefetchDELL USA LP·Filed 1997·Granted May 11, 1999·59 cites·15 claims
- 3870US5781926AMethod and apparatus for sub cache line access and storage allowing access to sub cache lines before completion of line fillINTEGRATED DEVICE TECH·Filed 1996·Granted Jul 14, 1998·59 cites·43 claims
- 3969US8242802B2Location-based bus termination for multi-core processorsGASKINS DARIUS D·Filed 2009·Granted Aug 14, 2012·4 cites·21 claims
- 4069US6513104B1Byte-wise write allocate with retry trackingI P FIRST LLC·Filed 2000·Granted Jan 28, 2003·15 cites·25 claims
- 4168US9460038B2Multi-core microprocessor internal bypass busGASKINS DARIUS D·Filed 2011·Granted Oct 4, 2016·2 cites·22 claims
- 4268US8762779B2Multi-core processor with external instruction execution rate heartbeatGASKINS DARIUS D·Filed 2010·Granted Jun 24, 2014·2 cites·26 claims
- 4368US8683253B2Optimized synchronous strobe transmission mechanismGASKINS DARIUS D·Filed 2011·Granted Mar 25, 2014·2 cites·21 claims
- 4468US6903582B2Integrated circuit timing debug apparatus and methodIP FIRST LLC·Filed 2003·Granted Jun 7, 2005·12 cites·24 claims
- 4568US5623700AInterface circuit having zero latency buffer memory and cache memory information transferDELL USA LP·Filed 1994·Granted Apr 22, 1997·47 cites·24 claims
- 4668US5623633ACache-based computer system employing a snoop control circuit with write-back suppressionDELL USA LP·Filed 1993·Granted Apr 22, 1997·50 cites·8 claims
- 4766US10409347B2Domain-differentiated power state coordination systemVIA TECH INC·Filed 2018·Granted Sep 10, 2019·0 cites·20 claims
- 4866US7444570B2Apparatus and method for controlling frequency of an I/O clock for an integrated circuit during testVIA TECH INC·Filed 2006·Granted Oct 28, 2008·3 cites·20 claims
- 4965US7457718B2Apparatus and method for dynamic configuration of temperature profile in an integrated circuitVIA TECH INC·Filed 2007·Granted Nov 25, 2008·2 cites·9 claims
- 5065US6675287B1Method and apparatus for store forwarding using a response buffer data path in a write-allocate-configurable microprocessorIP FIRST LLC·Filed 2000·Granted Jan 6, 2004·10 cites·26 claims
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