Inventor · disambiguated record
Masahiko Toyonaga
Also filed as: TOYONAGA MASAHIKO
26 granted patents·849 citations·filing 1989–2005
97Inventor score
Files withMATSUSHITA ELECTRIC INDUSTRIAL CO LTD25
Top patents by PatentIndex Score
26 records- 0189US5852562AMethod and apparatus for designing an LSI layout utilizing cells having a predetermined wiring height in order to reduce wiring zonesMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 1995·Granted Dec 22, 1998·180 cites·6 claims
- 0278US6336205B1Method for designing semiconductor integrated circuitMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 1999·Granted Jan 1, 2002·90 cites·14 claims
- 0376US6473890B1Clock circuit and method of designing the sameFiled 2000·Granted Oct 29, 2002·26 cites·30 claims
- 0476US5272645AChannel routing methodMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 1991·Granted Dec 21, 1993·75 cites·1 claims
- 0572US6000829ASemiconductor integrated circuit capable of compensating for flucuations in power supply voltage level and method of manufacturing the sameMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 1997·Granted Dec 14, 1999·24 cites·12 claims
- 0670US5187668APlacement optimization system aided by cadMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 1990·Granted Feb 16, 1993·59 cites·14 claims
- 0769US7237220B2High level synthesis method for semiconductor integrated circuitMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 2005·Granted Jun 26, 2007·5 cites·49 claims
- 0867US6263475B1Method for optimizing component placement in designing a semiconductor device by using a cost valueMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 1998·Granted Jul 17, 2001·52 cites·4 claims
- 0964US6532581B1Method for designing layout of semiconductor device, storage medium having stored thereon program for executing the layout designing method, and semiconductor deviceMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 1999·Granted Mar 11, 2003·47 cites·11 claims
- 1061US6367061B1Semiconductor integrated circuit and manufacturing method therefor, semiconductor macro cell and automatic layout method therefor, and mask processing methodMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 1999·Granted Apr 2, 2002·15 cites·14 claims
- 1161US5267177AMethod for VLSI layout pattern compaction by using direct access memoryMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 1991·Granted Nov 30, 1993·37 cites·7 claims
- 1260US5896055AClock distribution circuit with clock branch circuits connected to outgoing and return lines and outputting synchronized clock signals by summing time integrals of clock signals on the outgoing and return linesMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 1996·Granted Apr 20, 1999·42 cites·6 claims
- 1358US6499133B1Method of optimizing placement of elementsMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 2000·Granted Dec 24, 2002·6 cites·4 claims
- 1456US6578182B2Delay analysis method and design assist apparatus of semiconductor circuitMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 2002·Granted Jun 10, 2003·4 cites·5 claims
- 1552US5999716ALSI layout design method capable of satisfying timing requirements in a reduced design processing timeMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 1997·Granted Dec 7, 1999·25 cites·5 claims
- 1650US6496963B2Delay analysis method and design assist apparatus of semiconductor circuitMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 2001·Granted Dec 17, 2002·1 cites·5 claims
- 1748US5978572ALSI wire length estimation and area estimationMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 1997·Granted Nov 2, 1999·25 cites·9 claims
- 1848US5673200ALogic synthesis method and logic synthesis apparatusMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 1996·Granted Sep 30, 1997·22 cites·10 claims
- 1947US5963730AMethod for automating top-down design processing for the design of LSI functions and LSI mask layoutsMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 1996·Granted Oct 5, 1999·21 cites·10 claims
- 2047US5159682ASystem for optimizing a physical organization of elements of an integrated circuit chip through the convergence of a redundancy functionMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 1989·Granted Oct 27, 1992·52 cites·6 claims
- 2143US7100136B2LSI design systemMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 2002·Granted Aug 29, 2006·0 cites·16 claims
- 2240US6096092AAutomatic synthesizing method for logic circuitsMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 1998·Granted Aug 1, 2000·17 cites·21 claims
- 2340US5490083AMethod and apparatus for classifying and evaluating logic circuitMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 1993·Granted Feb 6, 1996·12 cites·10 claims
- 2434US5657243AMethod and apparatus for automatically arranging circuit elements in data-path circuitMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 1995·Granted Aug 12, 1997·7 cites·8 claims
- 2529US6415423B1LSI design systemMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 1999·Granted Jul 2, 2002·2 cites·24 claims
- 2629US5479657ASystem and method for sorting count information by summing frequencies of usage and using the sums to determine write addressesMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 1993·Granted Dec 26, 1995·3 cites·12 claims
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