Inventor · disambiguated record
Joseph M. Sullivan
Also filed as: SULLIVAN JOSEPH M · SULLIVAN JOSEPH MICHAEL · SULLIVAN JR JOSEPH M
11 granted patents·390 citations·filing 1995–2003
91Inventor score
Files withIBM11
Top patents by PatentIndex Score
11 records- 0197US5800184AHigh density electrical interconnect apparatus and methodIBM·Filed 1995·Granted Sep 1, 1998·226 cites·31 claims
- 0287US6281452B1Multi-level thin-film electronic packaging structure and related methodIBM·Filed 1998·Granted Aug 28, 2001·53 cites·21 claims
- 0380US6678949B2Process for forming a multi-level thin-film electronic packaging structureIBM·Filed 2001·Granted Jan 20, 2004·21 cites·8 claims
- 0476US5838545AHigh performance, low cost multi-chip modle packageIBM·Filed 1996·Granted Nov 17, 1998·59 cites·3 claims
- 0561US6765152B2Multichip module having chips on two sidesIBM·Filed 2002·Granted Jul 20, 2004·9 cites·13 claims
- 0653US6497805B2Method for shorting pin grid array pins for platingIBM·Filed 2001·Granted Dec 24, 2002·5 cites·7 claims
- 0751US6527935B2Process for electroplating pins of an integrated circuit packageIBM·Filed 2001·Granted Mar 4, 2003·4 cites·8 claims
- 0841US6973715B2Method of forming a multichip module having chips on two sidesIBM·Filed 2003·Granted Dec 13, 2005·0 cites·6 claims
- 0936US6197171B1Pin contact mechanism for plating pin grid arraysIBM·Filed 1999·Granted Mar 6, 2001·5 cites·15 claims
- 1034US5729148AProbe assemblyIBM·Filed 1996·Granted Mar 17, 1998·5 cites·12 claims
- 1132US6214180B1Method for shorting pin grid array pins for platingIBM·Filed 1999·Granted Apr 10, 2001·3 cites·11 claims
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