Inventor · disambiguated record
Dahcheng Lin
Also filed as: LIN DAHCHENG
22 granted patents·1 pending application·608 citations·filing 1998–2002
96Inventor score
Files withVANGUARD INT SEMICONDUCT CORP12TAIWAN SEMICONDUCTOR MFG3TAIWAN SEMICONDUCTOR MFG CORP3WORLDWIDE SEMICONDUCTOR MANUFA2TAIWAN SEMICONDUTOR MFG CO LTD1
Top patents by PatentIndex Score
23 records- 0188US6046083AGrowth enhancement of hemispherical grain silicon on a doped polysilicon storage node capacitor structure, for dynamic random access memory applicationsVANGUARD INT SEMICONDUCT CORP·Filed 1998·Granted Apr 4, 2000·85 cites·11 claims
- 0287US6037238AProcess to reduce defect formation occurring during shallow trench isolation formationVANGUARD INT SEMICONDUCT CORP·Filed 1999·Granted Mar 14, 2000·90 cites·17 claims
- 0383US5913119AMethod of selective growth of a hemispherical grain silicon layer on the outer sides of a crown shaped DRAM capacitor structureVANGUARD INT SEMICONDUCT CORP·Filed 1998·Granted Jun 15, 1999·57 cites·23 claims
- 0479US6372572B1Method of planarizing peripheral circuit region of a DRAMTAIWAN SEMICONDUCTOR MFG·Filed 2001·Granted Apr 16, 2002·25 cites·18 claims
- 0579US5897352AMethod of manufacturing hemispherical grained polysilicon with improved adhesion and reduced capacitance depletionVANGUARD INT SEMICONDUCT CORP·Filed 1998·Granted Apr 27, 1999·40 cites·23 claims
- 0678US6037219AOne step in situ doped amorphous silicon layers used for selective hemispherical grain silicon formation for crown shaped capacitor applicationsVANGUARD INT SEMICONDUCT CORP·Filed 1998·Granted Mar 14, 2000·45 cites·27 claims
- 0775US5877052AResolution of hemispherical grained silicon peeling and row-disturb problems for dynamic random access memory, stacked capacitor structuresVANGUARD INT SEMICONDUCT CORP·Filed 1998·Granted Mar 2, 1999·39 cites·27 claims
- 0874US6074931AProcess for recess-free planarization of shallow trench isolationVANGUARD INT SEMICONDUCT CORP·Filed 1998·Granted Jun 13, 2000·47 cites·23 claims
- 0973US6822283B2Low temperature MIM capacitor for mixed-signal/RF applicationsTAIWAN SEMICONDUCTOR MFG·Filed 2002·Granted Nov 23, 2004·17 cites·27 claims
- 1072US5930625AMethod for fabricating a stacked, or crown shaped, capacitor structureVANGUARD INT SEMICONDUCT CORP·Filed 1998·Granted Jul 27, 1999·33 cites·19 claims
- 1164US6194265B1Process for integrating hemispherical grain silicon and a nitride-oxide capacitor dielectric layer for a dynamic random access memory capacitor structureVANGUARD INT SEMICONDUCT CORP·Filed 1999·Granted Feb 27, 2001·24 cites·24 claims
- 1260US6165830AMethod to decrease capacitance depletion, for a DRAM capacitor, via selective deposition of a doped polysilicon layer on a selectively formed hemispherical grain silicon layerVANGUARD INT SEMICONDUCT CORP·Filed 1998·Granted Dec 26, 2000·20 cites·18 claims
- 1357US6240015B1Method for reading 2-bit ETOX cells using gate induced drain leakage currentTAIWAN SEMICONDUCTOR MFG CORP·Filed 2000·Granted May 29, 2001·9 cites·5 claims
- 1456US6127221AIn situ, one step, formation of selective hemispherical grain silicon layer, and a nitride-oxide dielectric capacitor layer, for a DRAM applicationVANGUARD INT SEMICONDUCT CORP·Filed 1998·Granted Oct 3, 2000·17 cites·19 claims
- 1554US6100136AMethod of fabricating capacitor capable of maintaining the height of the peripheral area of the capacitorWORLDWIDE SEMICONDUCTOR MANUFA·Filed 1999·Granted Aug 8, 2000·15 cites·10 claims
- 1653US6004859AMethod for fabricating a stack capacitorWORLDWIDE SEMICONDUCTOR MANUFA·Filed 1999·Granted Dec 21, 1999·14 cites·15 claims
- 1748US6225214B1Method for forming contact plugTAIWAN SEMICONDUTOR MFG CO LTD·Filed 1999·Granted May 1, 2001·15 cites·11 claims
- 1839US6130146AIn-situ nitride and oxynitride deposition process in the same chamberVANGUARD INT SEMICONDUCT CORP·Filed 1999·Granted Oct 10, 2000·7 cites·14 claims
- 1937US6197652B1Fabrication method of a twin-tub capacitorWORLDWIDE SEMICONDUCTOR MFG·Filed 1999·Granted Mar 6, 2001·5 cites·18 claims
- 2034US6162732AMethod for reducing capacitance depletion during hemispherical grain polysilicon synthesis for DRAMTAIWAN SEMICONDUCTOR MFG CORP·Filed 1999·Granted Dec 19, 2000·3 cites·4 claims
- 2131US6294437B1Method of manufacturing crown-shaped DRAM capacitorTAIWAN SEMICONDUCTOR MFG·Filed 1999·Granted Sep 25, 2001·1 cites·10 claims
- 2230US6291294B1Method for making a stack bottom storage node having reduced crystallization of amorphous polysiliconTAIWAN SEMICONDUCTOR MFG CORP·Filed 1998·Granted Sep 18, 2001·0 cites·6 claims
- 2329US2001001495A1Method for reducing contact resistanceFiled 1999·Application pending·0 cites
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