Inventor · disambiguated record
Don A. Van Dyke
Also filed as: VAN DYKE DON · VAN DYKE DON A · VAN DYKE DON ALAN
27 granted patents·2,538 citations·filing 1990–2018
98Inventor score
Files withCRAY RESEARCH INC9ATI INT SRL4SUPERCOMPUTER SYSTEMS LTD4ADVANCED MICRO DEVICES INC2INTEL CORP2
Top patents by PatentIndex Score
27 records- 0199US7047394B1Computer for execution of RISC and CISC instruction setsATI INT SRL·Filed 2000·Granted May 16, 2006·318 cites·72 claims
- 0298US7661107B1Method and apparatus for dynamic allocation of processing resourcesADVANCED MICRO DEVICES INC·Filed 2000·Granted Feb 9, 2010·195 cites·13 claims
- 0397US6195676B1Method and apparatus for user side scheduling in a multiprocessor operating system program that implements distributive scheduling of processesSILICON GRAPHICS INC·Filed 1993·Granted Feb 27, 2001·554 cites·6 claims
- 0497US5179702ASystem and method for controlling a highly parallel multiprocessor using an anarchy based scheduler for parallel execution thread schedulingSUPERCOMPUTER SYSTEMS LTD·Filed 1990·Granted Jan 12, 1993·637 cites·12 claims
- 0596US9087200B2Method and apparatus to provide secure application executionMCKEEN FRANCIS X·Filed 2012·Granted Jul 21, 2015·37 cites·4 claims
- 0693US5430884AScalar/vector processorCRAY RESEARCH INC·Filed 1990·Granted Jul 4, 1995·131 cites·11 claims
- 0793US5175856AComputer with integrated hierarchical representation (ihr) of program wherein ihr file is available for debugging and optimizing during target executionSUPERCOMPUTER SYSTEMS LTD·Filed 1990·Granted Dec 29, 1992·264 cites·18 claims
- 0884US5202975AMethod for optimizing instruction scheduling for a processor having multiple functional resourcesSUPERCOMPUTER SYSTEMS LTD·Filed 1992·Granted Apr 13, 1993·106 cites·3 claims
- 0981US10102380B2Method and apparatus to provide secure application executionINTEL CORP·Filed 2013·Granted Oct 16, 2018·4 cites·10 claims
- 1079US8635415B2Managing and implementing metadata in central processing unit using register extensionsPATEL BAIJU V·Filed 2009·Granted Jan 21, 2014·11 cites·13 claims
- 1173US5640524AMethod and apparatus for chaining vector instructionsCRAY RESEARCH INC·Filed 1995·Granted Jun 17, 1997·41 cites·8 claims
- 1270US8381223B2Method and apparatus for dynamic allocation of processing resourcesVAN DYKE KORBIN·Filed 2011·Granted Feb 19, 2013·3 cites·18 claims
- 1370US5745721APartitioned addressing apparatus for vector/scalar registersCRAY RESEARCH INC·Filed 1995·Granted Apr 28, 1998·34 cites·2 claims
- 1465US5659706AVector/scalar processor with simultaneous processing and instruction cache fillingCRAY RESEARCH INC·Filed 1995·Granted Aug 19, 1997·28 cites·1 claims
- 1564US8631261B2Context state management for processor feature setsVAN DYKE DON A·Filed 2007·Granted Jan 14, 2014·4 cites·17 claims
- 1664US7987465B2Method and apparatus for dynamic allocation of processing resourcesADVANCED MICRO DEVICES INC·Filed 2010·Granted Jul 26, 2011·1 cites·10 claims
- 1762US10885202B2Method and apparatus to provide secure application executionINTEL CORP·Filed 2018·Granted Jan 5, 2021·0 cites·18 claims
- 1862US8677163B2Context state management for processor feature setsVAN DYKE DON·Filed 2013·Granted Mar 18, 2014·2 cites·11 claims
- 1956US5544337AVector processor having registers for control by vector resistersCRAY RESEARCH INC·Filed 1995·Granted Aug 6, 1996·33 cites·7 claims
- 2055US5307478AMethod for inserting a path instruction during compliation of computer programs for processors having multiple functional unitsSUPERCOMPUTER SYSTEMS LTD·Filed 1992·Granted Apr 26, 1994·29 cites·1 claims
- 2153US5623650AMethod of processing a sequence of conditional vector IF statementsCRAY RESEARCH INC·Filed 1995·Granted Apr 22, 1997·28 cites·4 claims
- 2252US5706490AMethod of processing conditional branch instructions in scalar/vector processorCRAY RESEARCH INC·Filed 1995·Granted Jan 6, 1998·15 cites·2 claims
- 2344US6904515B1Multi-instruction set flag preservation apparatus and methodATI INT SRL·Filed 1999·Granted Jun 7, 2005·15 cites·20 claims
- 2443US7254231B1Encryption/decryption instruction set enhancementATI INT SRL·Filed 1999·Granted Aug 7, 2007·15 cites·21 claims
- 2541US6643726B1Method of manufacture and apparatus of an integrated computing systemATI INT SRL·Filed 1999·Granted Nov 4, 2003·13 cites·14 claims
- 2641US5598547AVector processor having functional unit paths of differing pipeline lengthsCRAY RESEARCH INC·Filed 1995·Granted Jan 28, 1997·14 cites·2 claims
- 2739US5717881AData processing system for processing one and two parcel instructionsCRAY RESEARCH INC·Filed 1995·Granted Feb 10, 1998·6 cites·1 claims
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