Inventor · disambiguated record
John Michael Borkenhagen
Also filed as: BORKENHAGEN JOHN · BORKENHAGEN JOHN M · BORKENHAGEN JOHN MICHAEL
95 granted patents·11 pending applications·2,740 citations·filing 1987–2018
99Inventor score
Files withIBM80LENOVO ENTPR SOLUTIONS SINGAPORE PTE LTD5ARMSTRONG WILLIAM J4BARTLEY GERALD KEITH4BORKENHAGEN JOHN M4
Top patents by PatentIndex Score
106 records- 0198US6212544B1Altering thread priorities in a multithreaded processorIBM·Filed 1997·Granted Apr 3, 2001·537 cites·23 claims
- 0297US6567839B1Thread switch control in a multithreaded processor systemIBM·Filed 1997·Granted May 20, 2003·424 cites·34 claims
- 0395US8547825B2Switch fabric managementARMSTRONG WILLIAM J·Filed 2011·Granted Oct 1, 2013·29 cites·18 claims
- 0495US6697935B1Method and apparatus for selecting thread switch events in a multithreaded processorIBM·Filed 1997·Granted Feb 24, 2004·273 cites·21 claims
- 0595US6076157AMethod and apparatus to force a thread switch in a multithreaded processorIBM·Filed 1997·Granted Jun 13, 2000·292 cites·17 claims
- 0693US6754858B2SDRAM address error detection method and apparatusIBM·Filed 2001·Granted Jun 22, 2004·72 cites·20 claims
- 0792US6940760B2Data strobe gating for source synchronous communications interfaceIBM·Filed 2003·Granted Sep 6, 2005·58 cites·15 claims
- 0892US6442102B1Method and apparatus for implementing high speed DDR SDRAM read interface with reduced ACLV effectsIBM·Filed 2001·Granted Aug 27, 2002·70 cites·18 claims
- 0991US7496711B2Multi-level memory architecture with data prioritizationIBM·Filed 2006·Granted Feb 24, 2009·26 cites·19 claims
- 1091US6760856B1Programmable compensated delay for DDR SDRAM interface using programmable delay loop for reference calibrationIBM·Filed 2000·Granted Jul 6, 2004·70 cites·16 claims
- 1190US7309911B2Method and stacked memory structure for implementing enhanced cooling of memory devicesIBM·Filed 2005·Granted Dec 18, 2007·19 cites·19 claims
- 1289US6105051AApparatus and method to guarantee forward progress in execution of threads in a multithreaded processorIBM·Filed 1997·Granted Aug 15, 2000·148 cites·14 claims
- 1388US7254663B2Multi-node architecture with daisy chain communication link configurable to operate in unidirectional and bidirectional modesIBM·Filed 2004·Granted Aug 7, 2007·46 cites·11 claims
- 1486US9851996B2Applying firmware updates in a system with zero downtime by selectively offlining and onlining hardware using a scale-up hypervisor layerLENOVO ENTPR SOLUTIONS SINGAPORE PTE LTD·Filed 2015·Granted Dec 26, 2017·5 cites·20 claims
- 1586US8745438B2Reducing impact of a switch failure in a switch fabric via switch cardsIBM·Filed 2012·Granted Jun 3, 2014·7 cites·20 claims
- 1685US8819677B2Virtual machine data structures corresponding to nested virtualization levelsDAY II MICHAEL D·Filed 2010·Granted Aug 26, 2014·10 cites·17 claims
- 1785US8010215B2Structure for selecting processors for job scheduling using measured power consumptionIBM·Filed 2008·Granted Aug 30, 2011·14 cites·7 claims
- 1885US7707379B2Dynamic latency map for memory optimizationIBM·Filed 2007·Granted Apr 27, 2010·14 cites·18 claims
- 1985US7334070B2Multi-channel memory architecture for daisy chained arrangements of nodes with bridging between memory channelsIBM·Filed 2004·Granted Feb 19, 2008·42 cites·30 claims
- 2084US8495267B2Managing shared computer memory using multiple interruptsABALI BULENT·Filed 2010·Granted Jul 23, 2013·8 cites·20 claims
- 2183US6088788ABackground completion of instruction and associated fetch request in a multithread processorIBM·Filed 1996·Granted Jul 11, 2000·123 cites·19 claims
- 2282US9338528B2Optimal positioning of reflecting optical devicesGLOBALFOUNDRIES INC·Filed 2013·Granted May 10, 2016·8 cites·15 claims
- 2382US7533198B2Memory controller and method for handling DMA operations during a page copyIBM·Filed 2005·Granted May 12, 2009·10 cites·6 claims
- 2481US8948000B2Switch fabric managementIBM·Filed 2012·Granted Feb 3, 2015·5 cites·20 claims
- 2581US8745437B2Reducing impact of repair actions following a switch failure in a switch fabricARMSTRONG WILLIAM J·Filed 2011·Granted Jun 3, 2014·5 cites·24 claims
- 2680US8880938B2Reducing impact of a repair action in a switch fabricIBM·Filed 2012·Granted Nov 4, 2014·5 cites·20 claims
- 2780US7966455B2Memory compression implementation in a multi-node server system with directly attached processor memoryIBM·Filed 2008·Granted Jun 21, 2011·9 cites·25 claims
- 2879US8151265B2Apparatus for and method for real-time optimization of virtual machine input/output performanceBEN-YEHUDA SHMUEL·Filed 2007·Granted Apr 3, 2012·9 cites·15 claims
- 2979US7822936B2Memory chip for high capacity memory subsystem supporting replication of command dataIBM·Filed 2007·Granted Oct 26, 2010·9 cites·20 claims
- 3077US7873773B2Multi-node architecture with daisy chain communication link configurable to operate in unidirectional and bidirectional modesIBM·Filed 2007·Granted Jan 18, 2011·7 cites·21 claims
- 3177US6671211B2Data strobe gating for source synchronous communications interfaceIBM·Filed 2001·Granted Dec 30, 2003·20 cites·20 claims
- 3276US7809913B2Memory chip for high capacity memory subsystem supporting multiple speed busIBM·Filed 2007·Granted Oct 5, 2010·7 cites·10 claims
- 3376US7783793B2Handling DMA operations during a page copyIBM·Filed 2008·Granted Aug 24, 2010·6 cites·8 claims
- 3475US8037251B2Memory compression implementation using non-volatile memory in a multi-node server system with directly attached processor memoryIBM·Filed 2008·Granted Oct 11, 2011·6 cites·20 claims
- 3575US7996641B2Structure for hub for supporting high capacity memory subsystemIBM·Filed 2008·Granted Aug 9, 2011·7 cites·14 claims
- 3675US7577793B2Patrol snooping for higher level cache eviction candidate identificationIBM·Filed 2006·Granted Aug 18, 2009·7 cites·7 claims
- 3774US7725762B2Implementing redundant memory access using multiple controllers on the same bank of memoryIBM·Filed 2007·Granted May 25, 2010·6 cites·17 claims
- 3873US8108647B2Digital data architecture employing redundant links in a daisy chain of component modulesBARTLEY GERALD KEITH·Filed 2009·Granted Jan 31, 2012·6 cites·20 claims
- 3973US6839816B2Shared cache line update mechanismIBM·Filed 2002·Granted Jan 4, 2005·19 cites·16 claims
- 4071US7546410B2Self timed memory chip having an apportionable data busIBM·Filed 2006·Granted Jun 9, 2009·5 cites·3 claims
- 4170US8677175B2Reducing impact of repair actions following a switch failure in a switch fabricIBM·Filed 2012·Granted Mar 18, 2014·2 cites·8 claims
- 4269US7984240B2Memory compression implementation in a system with directly attached processor memoryIBM·Filed 2008·Granted Jul 19, 2011·4 cites·25 claims
- 4369US7930483B2Associativity implementation in a system with directly attached processor memoryIBM·Filed 2008·Granted Apr 19, 2011·4 cites·21 claims
- 4468US7725620B2Handling DMA requests in a virtual memory environmentIBM·Filed 2005·Granted May 25, 2010·3 cites·8 claims
- 4568US7620763B2Memory chip having an apportionable data busIBM·Filed 2006·Granted Nov 17, 2009·4 cites·13 claims
- 4668US6151664AProgrammable SRAM and DRAM cache interface with preset access prioritiesIBM·Filed 1999·Granted Nov 21, 2000·50 cites·26 claims
- 4767US7921264B2Dual-mode memory chip for high capacity memory subsystemIBM·Filed 2007·Granted Apr 5, 2011·4 cites·17 claims
- 4866US7707463B2Implementing directory organization to selectively optimize performance or reliabilityIBM·Filed 2005·Granted Apr 27, 2010·3 cites·16 claims
- 4965US7613870B2Efficient memory usage in systems including volatile and high-density memoriesIBM·Filed 2004·Granted Nov 3, 2009·10 cites·22 claims
- 5065US6263404B1Accessing data from a multiple entry fully associative cache buffer in a multithread data processing systemIBM·Filed 1997·Granted Jul 17, 2001·47 cites·61 claims
Showing the top 50 of 106 patent records by PatentIndex Score.
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