Inventor · disambiguated record
Tomoko Ogura
Also filed as: OGURA TOMOKO
50 granted patents·3 pending applications·1,756 citations·filing 1998–2014
99Inventor score
Files withHALO LSI INC34HALO LSI DESIGN & DEVICE TECH6OGURA TOMOKO3HALO LSI DEVICE & DESIGN TECHN2NEW HALO INC2
Top patents by PatentIndex Score
53 records- 0198US6133098AProcess for making and programming and operating a dual-bit multi-level ballistic flash memoryHALO LSI DESIGN & DEVICE TECH·Filed 1999·Granted Oct 17, 2000·251 cites·63 claims
- 0297US6670240B2Twin NAND device structure, array operations and fabrication methodHALO LSI INC·Filed 2002·Granted Dec 30, 2003·124 cites·38 claims
- 0397US6177318B1Integration method for sidewall split gate monos transistorHALO LSI DESIGN & DEVICE TECH·Filed 1999·Granted Jan 23, 2001·198 cites·24 claims
- 0496US6248633B1Process for making and programming and operating a dual-bit multi-level ballistic MONOS memoryHALO LSI DESIGN & DEVICE TECH·Filed 1999·Granted Jun 19, 2001·347 cites·64 claims
- 0590US6477088B2Usage of word voltage assistance in twin MONOS cell during program and eraseHALO LSI DESIGN & DEVICE TECH·Filed 2001·Granted Nov 5, 2002·56 cites·32 claims
- 0689US6914791B1High efficiency triple well charge pump circuitHALO LSI INC·Filed 2003·Granted Jul 5, 2005·78 cites·38 claims
- 0789US6686632B2Dual-bit multi-level ballistic MONOS memoryNEW HALO INC·Filed 2001·Granted Feb 3, 2004·43 cites·21 claims
- 0889US6549463B2Fast program to program verify methodHALO LSI INC·Filed 2001·Granted Apr 15, 2003·31 cites·7 claims
- 0989US6459622B1Twin MONOS memory cell usage for wide programHALO LSI INC·Filed 2002·Granted Oct 1, 2002·50 cites·43 claims
- 1088US7031192B1Non-volatile semiconductor memory and driving methodHALO LSI INC·Filed 2003·Granted Apr 18, 2006·46 cites·27 claims
- 1188US6807105B2Fast program to program verify methodHALO LSI INC·Filed 2003·Granted Oct 19, 2004·27 cites·4 claims
- 1288US6366500B1Process for making and programming and operating a dual-bit multi-level ballistic flash memoryHALO LSI DEVICE & DESIGN TECHN·Filed 2000·Granted Apr 2, 2002·37 cites·45 claims
- 1385US6999345B1Method of sense and program verify without a reference cell for non-volatile semiconductor memoryHALO LSI INC·Filed 2003·Granted Feb 14, 2006·35 cites·32 claims
- 1485US6759290B2Stitch and select implementation in twin MONOS arrayHALO LSI INC·Filed 2002·Granted Jul 6, 2004·31 cites·40 claims
- 1585US6535430B2Wordline decoder for flash memoryHALO INC·Filed 2001·Granted Mar 18, 2003·49 cites·13 claims
- 1685US6359807B1Process for making and programming and operating a dual-bit multi-level ballistic flash memoryHALO LSI DEVICE & DESIGN TECHN·Filed 2000·Granted Mar 19, 2002·32 cites·3 claims
- 1784US7742336B2Trap-charge non-volatile switch connector for programmable logicGUMBO LOGIC INC·Filed 2007·Granted Jun 22, 2010·12 cites·4 claims
- 1883US7006378B1Array architecture and operation methods for a nonvolatile memoryHALO LSI INC·Filed 2003·Granted Feb 28, 2006·31 cites·39 claims
- 1983US6825084B2Twin NAND device structure, array operations and fabrication methodHALO LSI INC·Filed 2003·Granted Nov 30, 2004·25 cites·13 claims
- 2082US6542412B2Process for making and programming and operating a dual-bit multi-level ballistic flash memoryHALO LSI INC·Filed 2002·Granted Apr 1, 2003·26 cites·9 claims
- 2180US8139410B2Trap-charge non-volatile switch connector for programmable logicOGURA TOMOKO·Filed 2010·Granted Mar 20, 2012·5 cites·6 claims
- 2280US6714456B1Process for making and programming and operating a dual-bit multi-level ballistic flash memoryHALO LSI INC·Filed 2002·Granted Mar 30, 2004·24 cites·7 claims
- 2378US7352033B2Twin MONOS array for high speed applicationHALO LSI INC·Filed 2005·Granted Apr 1, 2008·8 cites·5 claims
- 2478US6567314B1Data programming implementation for high efficiency CHE injectionHALO LSI INC·Filed 2001·Granted May 20, 2003·25 cites·27 claims
- 2577US6631088B2Twin MONOS array metal bit organization and single cell operationHALO LSI INC·Filed 2002·Granted Oct 7, 2003·24 cites·35 claims
- 2667US8633544B2Twin MONOS array for high speed applicationSATOH KIMIHIRO·Filed 2008·Granted Jan 21, 2014·4 cites·5 claims
- 2767US8325542B2Complementary reference method for high reliability trap-type non-volatile memoryOGURA NORI·Filed 2009·Granted Dec 4, 2012·6 cites·6 claims
- 2867US6631089B1Bit line decoding scheme and circuit for dual bit memory arrayHALO LSI INC·Filed 2002·Granted Oct 7, 2003·15 cites·35 claims
- 2966US7149126B2Process for making and programming and operating a dual-bit multi-level ballistic MONOS memoryNEW HALO INC·Filed 2004·Granted Dec 12, 2006·11 cites·3 claims
- 3066US6038169ARead reference scheme for flash memoryHALO LSI DESIGN & DEVICE TECH·Filed 1999·Granted Mar 14, 2000·24 cites·17 claims
- 3165US6643172B2Bit line decoding scheme and circuit for dual bit memory with a dual bit selectionHALO LSI INC·Filed 2002·Granted Nov 4, 2003·13 cites·20 claims
- 3264US6636438B2Control gate decoder for twin MONOS memory with two bit erase capabilityHALO LSI INC·Filed 2002·Granted Oct 21, 2003·13 cites·27 claims
- 3363US9123419B2Complementary reference method for high reliability trap-type non-volatile memoryHALO LSI INC·Filed 2012·Granted Sep 1, 2015·2 cites·1 claims
- 3461US7936604B2High speed operation method for twin MONOS metal bit arrayHALO LSI INC·Filed 2005·Granted May 3, 2011·4 cites·18 claims
- 3560US6069824ASemiconductor memory deviceMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 1999·Granted May 30, 2000·19 cites·8 claims
- 3654US6636439B1Fast program to program verify methodHALO LSI INC·Filed 2003·Granted Oct 21, 2003·4 cites·5 claims
- 3754US6628546B2Fast program to program verify methodHALO LSI INC·Filed 2003·Granted Sep 30, 2003·4 cites·6 claims
- 3853US7046553B2Fast program to program verify methodHALO LSI INC·Filed 2003·Granted May 16, 2006·4 cites·4 claims
- 3951US7447077B2Referencing scheme for trap memoryHALO LSI INC·Filed 2006·Granted Nov 4, 2008·2 cites·13 claims
- 4049US7118961B2Stitch and select implementation in twin MONOS arrayHALO LSI INC·Filed 2004·Granted Oct 10, 2006·3 cites·32 claims
- 4148US2014133245A1Twin MONOS Array for High Speed ApplicationHALO LSI INC·Filed 2014·Application pending·0 cites
- 4248US2014133244A1Twin MONOS Array for High Speed ApplicationHALO LSI INC·Filed 2014·Application pending·0 cites
- 4346US6856545B2Fast program to program verify methodHALO LSI INC·Filed 2003·Granted Feb 15, 2005·2 cites·4 claims
- 4446US6628547B2Fast program to program verify methodHALO LSI INC·Filed 2003·Granted Sep 30, 2003·2 cites·8 claims
- 4545US8027198B2Trap-charge non-volatile switch connector for programmable logicHALO LSI INC·Filed 2010·Granted Sep 27, 2011·0 cites·6 claims
- 4645US8023326B2Trap-charge non-volatile switch connector for programmable logicHALO LSI INC·Filed 2010·Granted Sep 20, 2011·0 cites·4 claims
- 4744US8089809B2Trap-charge non-volatile switch connector for programmable logicOGURA TOMOKO·Filed 2010·Granted Jan 3, 2012·0 cites·5 claims
- 4843US6002611AFast, low current program with auto-program for flash memoryHALO LSI DESIGN & DEVICE TECH·Filed 1998·Granted Dec 14, 1999·8 cites·20 claims
- 4941US8174885B2High speed operation method for twin MONOS metal bit arrayOGURA TOMOKO·Filed 2011·Granted May 8, 2012·0 cites·22 claims
- 5040US2014243493A1(meth) acrylate resin composition and cured product of samePANASONIC CORP·Filed 2013·Application pending·0 cites
Showing the top 50 of 53 patent records by PatentIndex Score.
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