Inventor · disambiguated record
Egor A. Andreev
Also filed as: ANDREEV EGOR A
2 granted patents·1 pending application·5 citations·filing 2001–2002
51Inventor score
Files withLSI LOGIC CORP2
Top patents by PatentIndex Score
3 records- 0149US6615397B1Optimal clock timing schedule for an integrated circuitLSI LOGIC CORP·Filed 2001·Granted Sep 2, 2003·2 cites·16 claims
- 0241US6886088B2Memory that allows simultaneous read requestsLSI LOGIC CORP·Filed 2002·Granted Apr 26, 2005·3 cites·25 claims
- 0339US2002091983A1Optimal clock timing schedule for an integrated circuitFiled 2001·Application pending·0 cites
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