Inventor · disambiguated record
Ekanayake A. Amerasekera
Also filed as: AMERASEKERA EKANAYAKE · AMERASEKERA EKANAYAKE A · AMERASEKERA EKANAYAKE AJITH
8 granted patents·223 citations·filing 1994–2009
88Inventor score
Top patents by PatentIndex Score
8 records- 0187US6015992ABistable SCR-like switch for ESD protection of silicon-on-insulator integrated circuitsTEXAS INSTRUMENTS INC·Filed 1997·Granted Jan 18, 2000·77 cites·9 claims
- 0287US5907462AGate coupled SCR for ESD protection circuitsTEXAS INSTRUMENTS INC·Filed 1994·Granted May 25, 1999·68 cites·20 claims
- 0369US6963111B2Efficient pMOS ESD protection circuitTEXAS INSTRUMENTS INC·Filed 2003·Granted Nov 8, 2005·15 cites·2 claims
- 0466US7973557B2IC having programmable digital logic cellsTEXAS INSTRUMENTS INC·Filed 2009·Granted Jul 5, 2011·5 cites·20 claims
- 0565US7196887B2PMOS electrostatic discharge (ESD) protection deviceTEXAS INSTRUMENTS INC·Filed 2003·Granted Mar 27, 2007·12 cites·11 claims
- 0663US6078083AESD protection circuit for dual 3V/5V supply devices using single thickness gate oxidesTEXAS INSTRUMENTS INC·Filed 1995·Granted Jun 20, 2000·23 cites·6 claims
- 0749US8102187B2Localized calibration of programmable digital logic cellsBATRA ANUJ·Filed 2009·Granted Jan 24, 2012·2 cites·37 claims
- 0847US5949694AMethod and system for extracting high current parasitic bipolar transistor parameters of an MOS device during overvoltage eventsTEXAS INSTRUMENTS INC·Filed 1997·Granted Sep 7, 1999·21 cites·7 claims
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