Inventor · disambiguated record
Bruce A. Tennant
Also filed as: TENNANT BRUCE · TENNANT BRUCE A
17 granted patents·82 citations·filing 2008–2022
92Inventor score
Top patents by PatentIndex Score
17 records- 0197US11669481B2Enabling sync header suppression latency optimization in the presence of retimers for serial interconnectINTEL CORP·Filed 2021·Granted Jun 6, 2023·11 cites·20 claims
- 0295US11232058B2Enabling sync header suppression latency optimization in the presence of retimers for serial interconnectINTEL CORP·Filed 2019·Granted Jan 25, 2022·18 cites·20 claims
- 0393US10606785B2Flex bus protocol negotiation and enabling sequenceINTEL CORP·Filed 2018·Granted Mar 31, 2020·10 cites·22 claims
- 0492US10713209B2Recalibration of PHY circuitry for the PCI Express (PIPE) interface based on using a message bus interfaceINTEL CORP·Filed 2019·Granted Jul 14, 2020·11 cites·20 claims
- 0591US11144492B2Flex bus protocol negotiation and enabling sequenceINTEL CORP·Filed 2020·Granted Oct 12, 2021·3 cites·35 claims
- 0691US9720439B2Methods, apparatuses, and systems for deskewing link splitsINTEL CORP·Filed 2015·Granted Aug 1, 2017·10 cites·22 claims
- 0783US9124455B1Link equalization mechanismINTEL CORP·Filed 2014·Granted Sep 1, 2015·8 cites·25 claims
- 0871US11789892B2Recalibration of PHY circuitry for the PCI express (PIPE) interface based on using a message bus interfaceINTEL CORP·Filed 2022·Granted Oct 17, 2023·0 cites·19 claims
- 0969US8812878B2Limiting false wakeups of computing device components coupled via linksTAN SIN S·Filed 2009·Granted Aug 19, 2014·5 cites·20 claims
- 1068US11726939B2Flex bus protocol negotiation and enabling sequenceINTEL CORP·Filed 2021·Granted Aug 15, 2023·0 cites·20 claims
- 1167US8352764B2Dynamic squelch detection power controlINTEL CORP·Filed 2008·Granted Jan 8, 2013·4 cites·17 claims
- 1266US8996757B2Method and apparatus to generate platform correctable TX-RXINTEL CORP·Filed 2012·Granted Mar 31, 2015·2 cites·31 claims
- 1365US11327920B2Recalibration of PHY circuitry for the PCI express (pipe) interface based on using a message bus interfaceINTEL CORP·Filed 2020·Granted May 10, 2022·0 cites·26 claims
- 1461US11163717B2Reduced pin count interfaceINTEL CORP·Filed 2020·Granted Nov 2, 2021·0 cites·25 claims
- 1558US10706003B2Reduced pin count interfaceINTEL CORP·Filed 2019·Granted Jul 7, 2020·0 cites·25 claims
- 1654US10198394B2Reduced pin count interfaceINTEL CORP·Filed 2016·Granted Feb 5, 2019·0 cites·20 claims
- 1747US8958471B2Method, apparatus, and system for sliding matrix scoreboard utilized in auto feedback closed loopsINTEL CORP·Filed 2013·Granted Feb 17, 2015·0 cites·29 claims
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