Inventor · disambiguated record
Arun Achyuthan
Also filed as: ACHYUTHAN ARUN
7 granted patents·1 pending application·51 citations·filing 1997–2025
83Inventor score
Technology areasG11C
Top patents by PatentIndex Score
8 records- 0193US11626158B2Bit line pre-charge circuit for power management modes in multi bank SRAMTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Apr 11, 2023·3 cites·20 claims
- 0292US11935589B2Bit line pre-charge circuit for power management modes in multi bank SRAMTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Mar 19, 2024·2 cites·20 claims
- 0382US2025259675A1Bit Line Pre-Charge Circuit for Power Management Modes in Multi Bank SRAMTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 0479US12327586B2Bit line pre-charge circuit for power management modes in multi bank SRAMTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Granted Jun 10, 2025·0 cites·20 claims
- 0560US6144591ARedundancy selection circuit for semiconductor memoriesMOSAID TECHNOLOGIES INC·Filed 1998·Granted Nov 7, 2000·23 cites·4 claims
- 0649US5877992AData-bit redundancy in semiconductor memoriesMOSAID TECHNOLOGIES INC·Filed 1997·Granted Mar 2, 1999·14 cites·6 claims
- 0746US5959903AColumn redundancy in semiconductor memoriesMOSAID TECHNOLOGIES INC·Filed 1997·Granted Sep 28, 1999·9 cites·20 claims
- 0835US8681576B2Pre-charge and equalization devicesKATOCH ATUL·Filed 2011·Granted Mar 25, 2014·0 cites·15 claims
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →